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BENQ S53_图文

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ED3-UMA DESIGN
A

VER : F3B
A

RUN POWER SW PG 34

AC/BATT CONNECTOR BATT CHARGER

PG 37

Dothan
(478 Micro-FCPGA)

DC/DC +3V_SRC +5VSUS PG 34

CPU VR
PG 33

CLOCKS
PG 17

PG 37 PG 5, 6 FSB 133MHZ

LVDS

Panel Connector
PG 18

DDRII-SODIMM1
PG 15, 16 400/533 MHZ DDR II

Alviso 915GM/GML
TVOUT 1257 PCBGA VGA PG 7,8,9,10, 11 DMI interface USB2.0 (P0~P7) USB2.0 (P3) USB2.0 (P2) USB2.0 (P0~P1,P4)

S-Video
PG 24

S-Video reserved

DDRII-SODIMM2
B

PG 15, 16

VGA
PG 19

PR-VGA

B

Bluetooth
PG 24 PR-USB2.0
P2 reserved for third USB

SATA - HDD PG 20 PATA - HDD PG 20

SATA0

PATA 100

ICH6-M
LAN RTL8100S 6 09 BGA
PG 25

USB2.0 I/O PG 24 Ports
Magnetics PG 26

RJ45

PG 26 PR-LAN

Port Replicator
PG 31

Internal ODD CD-ROM
PG 20
C

PCI Bus 33MHz PG 12,13, 14 AC97/Azalia

CARDBUS PC7411
PG 21,22,23

MINI-PCI
PG 24

C

Conexant Audio PG 28

LPC

PCMCIA CON. PG 21

Card Reader PG 22 Serial

IEEE1394 CONN. PG 23

Wireless LAN Card PG 24 PR-COM PR-Printer PR-PS/2 PR-Audio out
D

AUDIO Amplifier PG 29

MDC DAA PG 30

KBC
NS97551 PG 32 X-Bus

Super IO
Parallel LPC47N217

D

Jack to Speaker PG 29

Audio Jacks PG 29

MODEM RJ 11 PG 26

Key Matrix PG 27

Touch Pad PG 27

Flash
PG 31 PG 32 IrDA PG 31

PROJECT : ED3

Quanta Computer Inc.
Size D a te:
1 2 3 4 5 6

D o c u m e n t Nu mb e r

Block Diagram 1
T u e sd a y, Ju n e 1 4 , 2 0 0 5
7

Rev A3A Sheet 1
8

of

38

PDF created with pdfFactory trial version www.pdffactory.com

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A

PCI ROUTING TABLE REQ0# / GNT0# REQ2# / GNT2# REQ1# / GNT1#

IDSEL AD24 AD19 AD17

INTERUPT PIRQA# PIRQB# , PIRQD# PIRQC#,PIRQD#,PIRQA#

DEVICE RTL8110S MINI-PCI TI 7411

SMB I

A

CLK GEN ICH6
MOSFET

DIMM1 DIMM0
+3VSUS
B

+3VRUN
B

SMB II

NS551

MOSFET

551 EPROM

Smart Battery

Thermal IC of CPU

+3VALW
C

+3VRUN
C

D

D

PROJECT : ED3

Quanta Computer Inc.
Size Document Number

Block Diagram 2
D ate:
1 2 3 4 5 6

R ev A3A Sheet 2
8

Tuesday, June 14, 2005
7

of

38

PDF created with pdfFactory trial version www.pdffactory.com

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Power Rail Flow
A A

VIN HWPG VRON CPU_VID[0..5] STP_CPU# DPRSLPVR PSI SC451

VHCORE

DC_IN

FB

VA

Diode

AO4404

IMVP_PWRGD

L M339 Charger

AO4411

VIN MAX1632A AOD4411

+15VALW +12VALW +5VALW

MAIND

2N7002

+12VRUN

CLK_EN#

+5VSUS MAIND AO4812 +5VRUN SUSD

Battery VIN MAINON
B

M B ATT

FB

3.3VREF +3VALW

+VCCP +3VSUS MAIND +2_5VRUN PG HWPG SUSD AO4812 +3VRUN
B

L M27281

+2_5VSUS HWPG MAIND

AO4414

SUSON

SI5402 VIN SC1470 SUSON +1_5VSUS +3VRUN FB AIC1117 +5VRUN
Controlled for RUN Rail

+3V_S5

HWPG

AO4414

+1_5VRUN

S5_ON

FB AMCVDD AVDD + 3V_MODEM FB FB

AVDD_CLK +3_3VDC +3_3VDD

+2_5VSUS MAINON +2_5VRUN
C

Pass Through for SUS Rail

+1_25VSUS

G 2966 FB FB +1_25VRUN +3VSUS
C

+5VRUN

AO6402

FAN_PWR +5VRUN +5VRUN +3VRUN FB FB FB +5VHDD +5VODD +3V_LAN_A +3VHDD CTRL18 1 197 +1P8V_LAN +3V_S5 FB +3V_LAN_D CTRL25 FB 1 197 +2P5V_LAN FB DVDD_LAN

D

D

PROJECT : ED3

Quanta Computer Inc.
Size Doc ument Number

Block Diagram 3
Dat e: Tues day , June 14, 2005 S heet
8

Rev A3A 3 of 38

PDF created with pdfFactory trial version www.pdffactory.com

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INDEX Pg#
1-3 4 5-6 7-11
A

Power and Ground DNI LIST New Label
VA VIN MBATT +15VALW +12VALW +12VRUN

Description Schematic Block Diagram FRONTPAGE Dothan/Younah ALVISO GM ICH6M DDRII SO-DIMM(200P) CLOCK GENERATOR LCD CONN & CRT CONN SATA & IDE (HDD&CD_ROM)
PCI7411 & CONN & IEEE1394

NOTE

Description
AC ADAPTER (20V) MAIN POWER (10~20V) MAIN BATTERY + (10~17V) +15V ALWAYS +12V ALWAYS +12V RUN

Control Signal or Source

A

12-14 15-16 17 18-19 20 21-23 24 25-26 27 28 29 30 31 32 33
B

MAINON

+5VALW +5V_S5 +5VSUS +5VRUN +5VHDD +5VODD +5VFDD FAN_PWR VDDA AMCVDD 3V_MODEM CONNECT TO +5VRUN DIRECTLY CONNECT TO +5VRUN DIRECTLY NO USE NO USE

+5V ALWAYS & KBC POWER THIS POWER WILL BE TUNEED OFF IN S5 BATTERY MODE +5V S5 CONTROLED POWER +5V S3 CONTROLED POWER +5V HDD POWER +5V ODD POWER EXTERNAL FDD POWER (5V) FAN POWER (5V) Amplifier Power 5V RUN Plane AC97 Code DAC Power 3VRUN MODEM Power 3VSUS S5_ON SUSD MAIND +5VHDD_EN# +5VMOD_EN# +5VFDD_EN# VFAN, MAX6657_OV# +5VRUN +3VSUS +5VRUN or +3VRUN

MINI-PCI & MDC CONN LAN & LAN Conn. TOUCH PAD & FAN&KB Azilia AC97 CODEC
Audio Amplifier MODEM DOCKING & SIO & FIR

KBC PC97551 CPU Power
3.3V/5V/12V/15V 1.5VSUS/1.5VRUN

34 35 36 37

+3VALW +3V_S5 +3VSUS +3VRUN +3VHDD CONNECT TO +3VRUN DIRECTLY

8051 POWER (3V) THIS POWER WILL BE TUNEED OFF IN S5 BATTERY MODE SLP_S5# CTRLD POWER SLP_S3# CTRLD POWER SATA HDD Power S5_ON SUSD MAIND +3VHDD_EN#

B

+VCCP/+1.25V/+2.5V Battery & Charger

+3V_LAN_D +3V_LAN_A +2P5V_LAN DVDD_LAN RTCVCC REF3V

LAN Digital Power LAN Analog Power LAN Analog Power LAN Digital Power 1.8 or 2.5V RTC & PCL POWER

+3V_S5 +3V_S5 +3V_LAN_D (+3V_S5) +2P5V_LAN(+3V_S5)

+2_5VSUS +2_5VRUN
C

SUSON MAIND
C

+1_8VSUS +1_8VRUN +1_8V_M24 +1_5V_S5 +1_5VSUS +1_5VRUN +1_25VSUS +1_25VRUN VGA1_2V VGACORE +VCCP VHCORE

NO USE NO USE NO USE THIS POWER WILL BE TUNEED OFF IN S5 BATTERY MODE +2_5VRUN +1_8VSUS or +1_8VRUN S5_ON SUSON AGP I/O POWER SMDDR_VTERM MAIND +2_5VSUS MAINON NO USE NO USE ATI VGA 1.2V ATI VGA CORE 1.0/1.2V AGTL+ POWER (1.05V) CPU CORE POWER (1.25/1.15V) +2_5VRUN MAINON, POW_SW MAINON VR_ON, HWPG

GND AGND GNDP CGNDP DC_GND LANGND

ALL PAGES Page 28,29 NO USE NO USE DC Jcak NO USE

DIGITAL GROUND AUDIO GND CPU POWER GND CHARGER GND DC/DC POWER GND

D

D

PROJECT : ED3
COMBO CONN GND
Size Doc ument Number

Quanta Computer Inc.
I ndex
Date: Tues day , June 14, 2005 Sheet
8

Re v A3A 4 of 38

PDF created with pdfFactory trial version www.pdffactory.com

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CT_0505: Change footprint to BGA479M-SOCKET from L100505 from MPGA479M
U 31A 7 H A # [ 3 ..3 1 ] H A # [3 ..3 1 ] H A#3 H A#4 H A#5 H A#6 H A#7 H A#8 H A#9 H A#10 H A#11 H A#12 H A#13 H A#14 H A#15 H A#16 H A#17 H A#18 H A#19 H A#20 H A#21 H A#22 H A#23 H A#24 H A#25 H A#26 H A#27 H A#28 H A#29 H A#30 H A#31 P4 U4 V3 R3 V2 W1 T4 W2 Y4 Y1 U1 AA3 Y3 AA2 AF4 AC4 AC7 AC3 AD3 AE4 AD2 AB4 AC6 AD5 AE2 AD6 AF3 AE1 AF1 A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# A19 A25 A22 B21 A24 B26 A21 B20 C20 B24 D24 E24 C26 B23 E23 C25 H23 G25 L23 M26 H24 F25 G24 J23 M23 J25 L26 N24 M25 H26 N25 K25 Y26 AA24 T25 U23 V23 R24 R26 R23 AA23 U26 V24 U25 V26 Y23 AA26 Y25 AB25 AC23 AB24 AC20 AC22 AC25 AD23 AE22 AF23 AD24 AF20 AE21 AD21 AF25 AF22 AF26 HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 H D # 10 H D # 11 H D # 12 H D # 13 H D # 14 H D # 15 H D # 16 H D # 17 H D # 18 H D # 19 H D # 20 H D # 21 H D # 22 H D # 23 H D # 24 H D # 25 H D # 26 H D # 27 H D # 28 H D # 29 H D # 30 H D # 31 H D # 32 H D # 33 H D # 34 H D # 35 H D # 36 H D # 37 H D # 38 H D # 39 H D # 40 H D # 41 H D # 42 H D # 43 H D # 44 H D # 45 H D # 46 H D # 47 H D # 48 H D # 49 H D # 50 H D # 51 H D # 52 H D # 53 H D # 54 H D # 55 H D # 56 H D # 57 H D # 58 H D # 59 H D # 60 H D # 61 H D # 62 H D # 63 H D # [ 0 ..6 3 ] H D # [ 0 ..6 3 ] 7

+ 3 V R UN

+ 3 V R UN

Dothan
1 OF 3

2

R 69 1 0 K -0 402

Q14 2 N7 0 0 2 3 MB DA TA MB DA TA 3 2 ,3 7

1

A

+ 3 V R UN + 3 V R UN R68 47 R66 1 0 K -0 402

+ 3 V R UN

A

15 MIL
3 V _ T HM C 83 . 1 U/1 0 V _ 4 U 18 K B S MDAT K B S MCL K

Q13 2 N7 0 0 2 3 M B CL K M B CL K 3 2 ,3 7

1 1 3 2 4 7 8 6 5 0 1

2

T H E R MDC

R E QUE S T P HA S E S IGNA L S

DA T A P HA S E S IGNA L S

VCC DXN DXP -OVT MAX6657

SMDATA SMCLK -ALT GND

2 R71

T H RM# 13 MA X 6 6 57_AL# 32

10 mil trace / 10 mil space

+ 3 V R UN

C 86 2 2 0 0P R 310 1 0 K -0 402 + 3 V R UN

R72 1 0 K -0 402

T H E RMDA

MA X 6 6 57_OV# 2 7 ,3 4

7 HA DS T B 0 # 7 HA DS T B 1 #
B

U3 AE5 R2 P3 T2 P1 T1 N2

ADSTB0# ADSTB1# REQ0# REQ1# REQ2# REQ3# REQ4# ADS# E RROR S IGNA L S

B

7 7 7 7 7

H R E Q# 0 H R E Q# 1 H R E Q# 2 H R E Q# 3 H R E Q# 4 7 A DS #

ITP disable guidelines
Signal TDI TMS TRST# TCK TDO Resistor Value 150 ohm +/- 5% 39 ohm +/- 5% 680 ohm +/- 5% 27 ohm +/- 5% Open Connect To VTT VTT GND GND VTT Resistor Placement Within 2.0" of the CPU Within 2.0" of the CPU Within 2.0" of the CPU Within 2.0" of the CPU Within 2.0" of the CPU

IE RR# 7 H B R E Q0 # 7 B P RI# 7 B NR# 7 H L O CK # 7 HIT# 7 H IT M# 7 D E F E R# T143 T144 T145 T146 7 HTRDY # 7 R S#0 7 R S#1 7 R S#2 12 A 2 0 M# 12 F E R R # 12 I G N N E # 12 C P U P W R G D 12 S MI# B P M0# B P M1# B P M2# B P M3#

A4 N4 J3 L1 J2 K3 K4 L4 C8 B8 A9 C9 M3 H1 K1 L2 C2 D3 A3 E4 B4 A13 A12 C12 C11 B13 A16 A15 B10 A10 A7 D1 D4 C6 A6 B7 G1 B18 A18 C17 B17

IERR# BREQ0# BPRI# BNR# LOCK# HIT# HITM# DEFER# BPM0# BPM1# BPM2# BPM3# TRDY# RS0# RS1# RS2# A20M# FERR# IGNNE# PWRGOOD SMI# TCK TDO TDI TMS TRST# ITP_CLK0 ITP_CLK1 PREQ# PRDY# DBR# LINT0 LINT1 STPCLK# SLP# DPSLP# DPRSTP# THERMDA THERMDC THERMTRIP# PROCHOT# D o th a n P ro ce sso r T H E R MA L DIODE A R B IT RA T ION P HA S E S IGNA L S S N OOP P HA S E S IGNA L S R E S P ONS E P HA S E S IGNA L S

Note: Populate R58, R62 when ITP connector is populated.
+ V C CP FE RR# R 60 1 R 319 1 R 58 1 56_4 2 56_4 2 2 0 0 /F 2 DB R# 2 + 3 V S US
C

C

A 2 0 M# FE RR# IGNN E# C P UP W RGD S MI# T CK T DO TDI TMS T RS T#

1 R 318 1 5 0 /F _ 4 + V C CP

PC C OMP A T IB IL IT Y S IGNA L S

D I A G N OS T IC & TEST S IGNA L S

DSTBN0# DSTBP0# DSTBN1# DSTBP1# DSTBN2# DSTBP2# DSTBN3# DSTBP3# DINV0# DINV1# DINV2# DINV3# DBSY# DRDY#

C23 C22 K24 L24 W25 W24 AE24 AE25 D25 J26 T24 AD20 M2 H2 B14 B15

H D S T B N0 # HDS T B P 0 # H D S T B N1 # HDS T B P 1 # H D S T B N2 # HDS T B P 2 # H D S T B N3 # HDS T B P 3 # H D B I0 # H D B I1 # H D B I2 # H D B I3 # 7 7 7 7

7 7 7 7 7 7 7 7

IE RR# C P UP W RGD

T91 T93 T147 T148 13 S Y S _ RE S E T#

*P A D *P A D *P A D *P A D

+ V CCP

P R E Q# P RDY # DB R#

1

1

1 R 316 5 4 .9 /F R 56 3 9 .2 /F 2

DB SY# 7 D R DY # 7 H C L K _ CP U# 17 H C L K _ CP U 17

R62

680

G1: NC for Dothan and DPRSTP# for Yonah

12 I N T R 12 N M I 12 S T P CL K# 7 ,1 2 C P US L P # 12 D P S L P # 12 D P RS T P #

R 317 5 4 .9 /F 2 2 TDI TMS T DO C P U RS T #

1 R57 1 5 0 /F _ 4 2

T CK T RS T#

R 3 1 5 2 7 .4 /F 1 2 1 2

S T P CL K# C P US L P # DP S L P # T H E RMDA T H E R MDC

E X E CUT ION C O N T ROL S IGNA L S

BCLK1 BCLK0

INIT# RESET# DPWR#

B5 B11 C19

C P U I N IT # C P U RS T #

C P U I NIT # 12 C P URS T # 7 DP W R# 7
D

D

8 ,1 2 T HE RMT RIP # + V C CP R 3 11

1 0_4 56_4

2 R 312

T HE RMT RIP 1 # C P U _ P R OCHOT #

PROJECT : ED3

Quanta Computer Inc.
Size D a te:
1 2 3 4 5 6

D o c u m e n t Nu mb e r

Dothan (HOST)
W e d n e sd a y, Ju n e 1 5 , 2 0 0 5
7

Rev A3A Sheet 5
8

of

38

PDF created with pdfFactory trial version www.pdffactory.com

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+ V CCP

C OMP 0 C OMP 1 C OMP 2 C OMP 3 2 2 2 2
A

Place voltage divider within 0.5" of GTLREF pin Trace as Wider as possible.

+ V CCP U 31B C OMP 0 C OMP 1 C OMP 2 C OMP 3 D10 D12 D14 D16 E11 E13 E15 F10 F12 F14 F16 K6 L5 L21 M6 M22 N5 N21 P6 P22 R5 R21 T6 T22 U21 P23 W4 E2 F2 F3 G3 G4 H4

U31C W23 W26 Y2 Y5 Y21 Y24 AA1 AA4 AA6 AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA25 AB3 AB5 AB7 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB26 AC2 AC5 AC8 AC10 AC12 AC14 AC16 AC18 AC21 AC24 AD1 AD4 AD7 AD9 AD11 AD13 AD15 AD17 AD19 AD22 AD25 AE3 AE6 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE23 AE26 AF2 AF5 AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF24

R15 1 K /F -0 4 02 1

P25 P26 AB2 AB1

COMP0 COMP1 COMP2 COMP3 GTLREF0 TEST1 TEST2 NC1 RSVD2 RSVD3 RSVD4 RSVD5 VCCA3 VCCA2 VCCA1 VCCA0

R16 2 K /F 1

2

R27 2 7 .4 /F 1 1

R 307 5 4 .9 /F 1

R 19 2 7 .4 /F 1

R 22 5 4 .9 /F

G T L RE F 0 AD26 T94 T89 T97 T95 T84 T83 T90 T85 T92 T96 R55 0_4 C P U _ V CCA TEST1 TEST2 C5 F23 B2 C3 AF7 AC1 E26 AC26 N1 B1 F26

Dothan
2 OF 3

Place pulldown resistors within 0.5" of COMP pins 18mils Trace Width of COMP0,2 5mils Trace Width of COMP1,3
1 C71 1

C P U _ V CCA C75

P O W E R, G R OUND, R E S E RV E D S IGNA L S

2

2

. 0 1 U/1 6 V _ 4 1 0 U_ 6 .3 V _ 8 + 1 _ 5 V RUN

Removed +1_8VRUN

V HCORE D6 D8 D18 D20 D22 E5 E7 E9 E17 E19 E21 F6 F8 F18 F20 F22 G5 G21 H6 H22 J5 J21 K22 U5 V6 V22 W5 W21 Y6 Y22 AA5 AA7 AA9 AA11 AA13 AA15 AA17 AA19 AA21 AB6 AB8 AB10 AB12 AB14 AB16 AB18 AB20 AB22 AC9 AC11 AC13 AC15 AC17 AC19 AD8 AD10 AD12 AD14 AD16 AD18 AE9 AE11 AE13 AE15 AE17 AE19 AF8 AF10 AF12 AF14 AF16 AF18 VCC00 VCC01 VCC02 VCC03 VCC04 VCC05 VCC06 VCC07 VCC08 VCC09 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71

V H C O RE

V HCORE

B

C37

C59

C 4 05

C 4 12

C 4 18

C 64

C 409

C 426

C 420

C 408

2

2

2

2

2

2

2

2

2

2

1 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 8

1 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 8

V H C O RE

V HCORE

C 4 07

C 4 15

C 4 06

C 4 04

C32

C 36

C 421

C 60

C 416

C 413

2

2

2

2

2

2

2

2

2

2

1 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 8

1 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 8

V H C O RE

V HCORE

C 4 19

C63

C62

C 4 14

C 4 11

C 35

C 417

C 410

C 33

C 422

2

2

2

2

2

1

1

1

1

C

1

1 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 8

1 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 8

V H C O RE

C34

C61

C 4 23

C 4 24

C 4 25

1

1

1

1

1

1 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 8

VHCORE
Total caps = 1670 uF > 1430 uF (Intel Recommendation) ESR = 9m ohm/4 // 5m ohm/35 ---> = 0.1343m ohm

+ V CCP

+ V CCP

D

C 427 + 1 5 0 U/6 .3 V _ 7
CC7343

C 44

C 51

C 73

C 76

C 46

C27

C52

C 30

C 45

C74

2

2

2

2

2

2

2

2

2

2

2

. 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4

. 1 U/1 0 V _ 41 U/1 0 V _ 41 U/1 0 V _ 41 U/1 0 V _ 41 U/1 0 V _ 4 . . . .

VSS00 VSS01 VSS02 VSS03 VSS04 VSS05 VSS06 VSS07 VSS08 VSS09 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99

A2 A5 A8 A11 A14 A17 A20 A23 A26 B3 B6 B9 B12 B16 B19 B22 B25 C1 C4 C7 C10 C13 C15 C18 C21 C24 D2 D5 D7 D9 D11 D13 D15 D17 D19 D21 D23 D26 E3 E6 E8 E10 E12 E14 E16 E18 E20 E22 E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1 M4 M5 M21 M24 N3 N6 N22 N23 N26 P2 P5 P21 P24 R1 R4

VCCP0 VCCP1 VCCP2 VCCP3 VCCP4 VCCP5 VCCP6 VCCP7 VCCP8 VCCP9 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16 VCCP17 VCCP18 VCCP19 VCCP20 VCCP21 VCCP22 VCCP23 VCCP24 VCCQ0 VCCQ1 VID0 VID1 VID2 VID3 VID4 VID5

Dothan
3 OF 3
P O W E R , G R O U N D A N D NC

33 33 33 33 33 33

C P U _ V ID0 C P U _ V ID1 C P U _ V ID2 C P U _ V ID3 C P U _ V ID4 C P U _ V ID5

VID

DothanA R313 NC

DothanB Install

T81 * P A D T82 * P A D

AE7 AF6

VCCSENSE VSSSENSE

S E L P S B 2 _ CLK R 3 1 3 1 S E L P S B 1 _ CLK R 3 1 4 1

2 0_4 2 0_4 R50 2 2 R 46 *0_NC 1

B S E L0 C16 B S E L1 C14 *0_NC E1 1 R6 R22 R25 T3 T5 T21 T23 T26 U2 U6 U22 U24 V1 V4 V5 V21 V25 W3 W6 W22

BSEL0 BSEL1 PSI VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119

P SI

No using for MAX1907

1 3 ,1 7 ,3 3 S T P _ CP U#

VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191

2

A

B

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

2

2

2

2

2

1

1

C

2

2

2

2

2

D o th a n P ro ce sso r

8 ,1 7 S E L P S B 2 _ CLK 8 ,1 7 S E L P S B 1 _ CLK

S E L P S B 2 _ CLK S E L P S B 1 _ CLK

1

1

1

1

1

1

1

1

1

1

1

D

PROJECT : ED3

C, mF---------ESR, mW-----------ESL, nH 1 x 150 mF-----42 mW (typ) / 2--------2.5 nH / 12 10 x 0.1 mF----16 mW (typ) / 10-------0.6 nH / 10

D o th a n P ro ce sso r Size D a te:

Quanta Computer Inc.
D o c u m e n t Nu mb e r

Dothan (Power)
W e d n e sd a y, Ju n e 1 5 , 2 0 0 5
7

Rev A3A Sheet 6
8

of

38

1

2

3

4

5

6

PDF created with pdfFactory trial version www.pdffactory.com

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2

3

4

5

6

7

8

U 33A H X RCOMP 1 R 98 2 4 .9 /F 2 5 H D # [ 0 ..6 3 ] H D # [ 0 ..6 3 ] HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 H D # 10 H D # 11 H D # 12 H D # 13 H D # 14 H D # 15 H D # 16 H D # 17 H D # 18 H D # 19 H D # 20 H D # 21 H D # 22 H D # 23 H D # 24 H D # 25 H D # 26 H D # 27 H D # 28 H D # 29 H D # 30 H D # 31 H D # 32 H D # 33 H D # 34 H D # 35 H D # 36 H D # 37 H D # 38 H D # 39 H D # 40 H D # 41 H D # 42 H D # 43 H D # 44 H D # 45 H D # 46 H D # 47 H D # 48 H D # 49 H D # 50 H D # 51 H D # 52 H D # 53 H D # 54 H D # 55 H D # 56 H D # 57 H D # 58 H D # 59 H D # 60 H D # 61 H D # 62 H D # 63 H X RCOMP HX S COMP H X S W ING HY RCOMP H Y S C OMP H Y S W ING E4 E1 F4 H7 E2 F1 E3 D3 K7 F2 J7 J8 H6 F3 K8 H5 H1 H2 K5 K6 J4 G3 H3 J1 L5 K4 J5 P7 L7 J3 P5 L3 U7 V6 R6 R5 P3 T8 R7 R8 U8 R4 T4 T5 R1 T3 V8 U6 W6 U3 V5 W8 W7 U2 U1 Y5 Y2 V4 Y7 W1 W3 Y3 Y6 W2 C1 C2 D1 T1 L1 P1 HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8# HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63# HXRCOMP HXSCOMP HXSWING HYRCOMP HYSCOMP HYSWING HA3# HA4# HA5# HA6# HA7# HA8# HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31# HADS# HADSTB0# HADSTB1# HVREF HBNR# HBPRI# BREQ0# HCPURST# G9 C9 E9 B7 A10 F9 D8 B10 E10 G10 D9 E11 F10 G11 G13 C10 C11 D11 C12 B13 A12 F12 G12 E12 C13 B11 D13 A13 F13 F8 B9 E13 J11 A5 D5 E7 H10 H A#3 H A#4 H A#5 H A#6 H A#7 H A#8 H A#9 H A#10 H A#11 H A#12 H A#13 H A#14 H A#15 H A#16 H A#17 H A#18 H A#19 H A#20 H A#21 H A#22 H A#23 H A#24 H A#25 H A#26 H A#27 H A#28 H A#29 H A#30 H A#31 H A # [3 ..3 1 ] H A # [ 3 ..3 1 ] 5

A

10mil Trace Length and Width

A

+ V CCP 1 R 95 5 4 .9 /F 2 HX S COMP

+ V CCP

+ V C CP

1

R 102 2 2 1 /F 2 H X S W ING 2 C 130

20mil Trace Length and Width

2 R 1 29 1 0 0 /F A DS # 5 HA DS T B 0 # 5 HA DS T B 1 # 5 B NR# 5 B P RI# 5 H B RE Q0 # 5 C P URS T # 5 1

B

1

close to Alviso 100mil
B

R 107 1 0 0 /F 2

HV R EF 1 1 C 160 . 1 U/1 0 V _ 4 2 R 1 28 2 0 0 /F 2

1

. 1 U/1 0 V _ 4

HY RCOMP 1

HOST

HCLKINN HCLKINP HDBSY# HDEFER# HDINV#0 HDINV#1 HDINV#2 HDINV#3 HDPWR# HDRDY# HDSTBN0# HDSTBN1# HDSTBN2# HDSTBN3# HDSTBP0# HDSTBP1# HDSTBP2# HDSTBP3# HEDRDY# HHIT# HHITM# HLOCK# HPCREQ# HREQ0# HREQ1# HREQ2# HREQ3# HREQ4# HRS0# HRS1# HRS2# HCPUSLP# HTRDY#

AB1 AB2 C6 E6 H8 K3 T7 U5 G6 F7 G4 K1 R3 V3 G5 K2 R2 W4 F6 D4 D6 B3 A11 A7 D7 B8 C7 A8 A4 C5 B4 G8 B5

H C L K _ MCH# 17 H C L K _ MCH 17 DB SY# 5 D E F E R# 5 H D B I0 # 5 H D B I1 # 5 H D B I2 # 5 H D B I3 # 5 DP W R# 5 D R DY # 5 H D S T B N0 # H D S T B N1 # H D S T B N2 # H D S T B N3 # HDS T B P 0 # HDS T B P 1 # HDS T B P 2 # HDS T B P 3 # H IT # 5 H IT M# 5 H L O CK # 5 H R E Q# 0 H R E Q# 1 H R E Q# 2 H R E Q# 3 H R E Q# 4 R S#0 5 R S#1 5 R S#2 5 5 5 5 5 5 R 89 1 0_4 2 C P US L P # 5 ,1 2

R 152 2 4 .9 /F 2

10mil Trace Length and Width

Concern about HVREF Trace Length & Width

+ V CCP 1

R 133 5 4 .9 /F
C

5 5 5 5 5 5 5 5

2

T7 *P AD T105 *P AD

H Y S C OMP

C

+ V CCP

1

R 143 2 2 1 /F 2 H Y S W ING 2 C 173

20mil Trace Length and Width

CT_0513: Install R89 0 ohm.

H C P U S L P # _ GMCH

HTRDY # 5

R 144 1 0 0 /F 2

1

A L V IS O

1

. 1 U/1 0 V _ 4

Do not install R89 for Dothan-A and install for Dothan-B

CT_0505: Change footprint to mbga1257-intel-alviso from MBGA-1257

D

D

PROJECT : ED3

Quanta Computer Inc.
Size D a te:
1 2 3 4 5 6

D o c u m e n t Nu mb e r

Alviso (HOST)
W e d n e sd a y, Ju n e 1 5 , 2 0 0 5
7

Rev A3A Sheet 7
8

of

38

PDF created with pdfFactory trial version www.pdffactory.com

1

2

3

4

5

6

7

8

+ V CCP 1

CFG6 1

CFG5 R 106 2 . 2 K /F 2 1 R 1 09 * 2 . 2 K /F _ NC

Low=DDR2 High=DDR1
R 1 26 1 0 K -0 402

Low=DMIx2 High=DMIx4
2

SDVOCTRL_DATA default is no SDOV
U 3 3F H24 H25 AB29 AC29 T104 INT _ T V _ COMP I N T _ T V _ Y /G I N T _ T V _ C/R T V _ RE F SET 1 A15 C16 A17 J18 B15 B16 B17 SDVOCTRL_DATA SDVOCTRL_CLK GCLKN GCLKP TVDAC_A TVDAC_B TVDAC_C TV_REFSET TV_IRTNA TV_IRTNB TV_IRTNC EXP_COMPI EXP_ICOMPO EXP_RXN0 EXP_RXN1 EXP_RXN2 EXP_RXN3 EXP_RXN4 EXP_RXN5 EXP_RXN6 EXP_RXN7 EXP_RXN8 EXP_RXN9 EXP_RXN10 EXP_RXN11 EXP_RXN12 EXP_RXN13 EXP_RXN14 EXP_RXN15 EXP_RXP0 EXP_RXP1 EXP_RXP2 EXP_RXP3 EXP_RXP4 EXP_RXP5 EXP_RXP6 EXP_RXP7 EXP_RXP8 EXP_RXP9 EXP_RXP10 EXP_RXP11 EXP_RXP12 EXP_RXP13 EXP_RXP14 EXP_RXP15 EXP_TXN0 EXP_TXN1 EXP_TXN2 EXP_TXN3 EXP_TXN4 EXP_TXN5 EXP_TXN6 EXP_TXN7 EXP_TXN8 EXP_TXN9 EXP_TXN10 EXP_TXN11 EXP_TXN12 EXP_TXN13 EXP_TXN14 EXP_TXN15 EXP_TXP0 EXP_TXP1 EXP_TXP2 EXP_TXP3 EXP_TXP4 EXP_TXP5 EXP_TXP6 EXP_TXP7 EXP_TXP8 EXP_TXP9 EXP_TXP10 EXP_TXP11 EXP_TXP12 EXP_TXP13 EXP_TXP14 EXP_TXP15 D36 D34 E30 F34 G30 H34 J30 K34 L30 M34 N30 P34 R30 T34 U30 V34 W30 Y34 D30 E34 F30 G34 H30 J34 K30 L34 M30 N34 P30 R34 T30 U34 V30 W34 E32 F36 G32 H36 J32 K36 L32 M36 N32 P36 R32 T36 U32 V36 W32 Y36 D32 E36 F32 G36 H32 J36 K32 L36 M32 N36 P32 R36 T32 U36 V32 W36 V C C 3 G _ P CIE _ R 1

V C C 3 G_ P CIE R 104 2 2 4 .9 /F
A

U33C 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 DMI_ T X N0 DMI_ T X N1 DMI_ T X N2 DMI_ T X N3 DMI_ T XP0 DMI_ T XP1 DMI_ T XP2 DMI_ T XP3 D M I_ RX N0 D M I_ RX N1 D M I_ RX N2 D M I_ RX N3 DMI_ RX P 0 DMI_ RX P 1 DMI_ RX P 2 DMI_ RX P 3 AA31 AB35 AC31 AD35 Y31 AA35 AB31 AC35 AA33 AB37 AC33 AD37 Y33 AA37 AB33 AC37 AM33 AL1 AE11 AJ34 AF6 C L K _ S DRA M5 AC10 C L K _ S DRA M2 AN33 AK1 C L K _ S DRA M2 # AE10 AJ33 AF5 C L K _ S DRA M5 # AD10 M_ CK E 0 M_ CK E 1 M_ CK E 2 M_ CK E 3 M_ CS # 0 M_ CS # 1 M_ CS # 2 M_ CS # 3 M _ O C DCOMP 0 M _ O C DCOMP 1 R 169 * 4 0 .2 /F 1 5 ,1 6 1 5 ,1 6 1 5 ,1 6 1 5 ,1 6 M _ ODT 0 M _ ODT 1 M _ ODT 2 M _ ODT 3 M _ R C OMP N M _ RCOMP P S M V RE F _ GMCH AP21 AM21 AH21 AK21 AN16 AM14 AH15 AG16 AF22 AF16 AP14 AL15 AM11 AN10 AK10 AK11 AF37 AD1 S MX SLEW AE27 AE28 S MY S L E W AF9 AF10 DMIRXN0 DMIRXN1 DMIRXN2 DMIRXN3 DMIRXP0 DMIRXP1 DMIRXP2 DMIRXP3 DMITXN0 DMITXN1 DMITXN2 DMITXN3 DMITXP0 DMITXP1 DMITXP2 DMITXP3 SM_CK0 SM_CK1 SM_CK2 SM_CK3 SM_CK4 SM_CK5 CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27 G16 H13 G14 F16 F15 G15 E16 D17 J16 D15 E15 D14 E14 H12 C14 H15 J15 H14 G22 G23 D23 G25 G24 J17 A31 A30 D26 D25 CFG0 S E L P S B 1 _ CLK S E L P S B 2 _ CLK CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 C F G 10 C F G 11 C F G 12 C F G 13 C F G 14 C F G 15 C F G 16 C F G 17 C F G 18 C F G 19 C F G 20 2 S E L P S B 1 _ CLK 6 ,1 7 S E L P S B 2 _ CLK 6 ,1 7 T18 T20 T26 T12 T13 T31 T5 T19 T2 T17 T25 T3 T33 T29 T21 T22 T14 2 1 T27 T28 17 C L K _ MCH_ 3 GP L L # 17 C L K _ MCH_ 3 GP L L

MISC

A

Reserved for AV
24 T V _ Y /G 24 T V _ C/R 4 . 9 9 K /F R 1 10 1

TV

R 99 R93 1 5 0 /F _ 4 1 5 0 /F _ 4 2 2

DMI

R 647 * 2 .2 1 K /F

CFG/RSVD

19 I N T _ D D C CL K 19 I N T _ D D CDA T 31 I NT _ V GA _ B L U 31 I N T _ V GA _ GRN 31 I N T _ V GA _ RE D

T42 15 M _ CL K OUT 3 15 M _ CL K OUT 4 T34 15 M _ CL K OUT 0 # 15 M _ CL K OUT 1 # T40 15 M _ CL K OUT 3 # 15 M _ CL K OUT 4 # T36 1 5 ,1 6 1 5 ,1 6 1 5 ,1 6 1 5 ,1 6 1 5 ,1 6 1 5 ,1 6 1 5 ,1 6 1 5 ,1 6 M_ CK E 0 M_ CK E 1 M_ CK E 2 M_ CK E 3 M_ CS # 0 M_ CS # 1 M_ CS # 2 M_ CS # 3

19 I N T _ V S Y NC 19 I N T _ H S Y NC

R81 R80 R 1 22

2 2

1 39 1 39

DDR MUXING

B

SM_CK0# SM_CK1# SM_CK2# SM_CK3# SM_CK4# SM_CK5# SM_CKE0 SM_CKE1 SM_CKE2 SM_CKE3 SM_CS0# SM_CS1# SM_CS2# SM_CS3# SM_OCDCOMP0 SM_OCDCOMP1 SM_ODT0 SM_ODT1 SM_ODT2 SM_ODT3 SMRCOMPN SMRCOMPP SMVREF0 SMVREF1 SMXSLEWIN SMXSLEWOUT SMYSLEWIN SMYSLEWOUT A L V IS O

Item135

RE F S E T 2 2 0 /F _ 4 I N T _ B L ON I N T _ DIS P _ ON T10 T8 T9 R97 T1 T23 T24 INT _ T X L CL K OUTINT _ T X L CL K OUT+ 1 .5 K /F E25 F25 C23 C22 F23 F22 F26 C33 C31 F28 F27 B30 B29 C25 C24 B34 B33 B32 A34 A33 B31 C29 D28 C27 C28 D27 C26 LBKLT_CTRL LBKLT_EN LCTLA_CLK LCTLB_DATA LDDC_CLK LDDC_DATA LVDD_EN LIBG LVBG LVREFH LVREFL LACLKN LACLKP LBCLKN LBCLKP LADATAN0 LADATAN1 LADATAN2 LADATAP0 LADATAP1 LADATAP2 LBDATAN0 LBDATAN1 LBDATAN2 LBDATAP0 LBDATAP1 LBDATAP2

PCI-EXPRESS GRAPHICS

15 M _ CL K OUT 0 15 M _ CL K OUT 1

1 R 103 1 R 96 1 R 94

I NT _ V GA _ B L U 2 1 5 0 /F _ 4 I N T _ V GA _ GRN 2 1 5 0 /F _ 4 I N T _ V GA _ RE D 2 1 5 0 /F _ 4

E24 E23 E21 D21 C20 B20 A19 B19 H21 G21 J20

DDCCLK DDCDATA BLUE BLUE# GREEN GREEN# RED RED# VSYNC HSYNC REFSET

VGA

B

BM_BUSY# EXT_TS0# EXT_TS1# THRMTRIP# PWROK RSTIN# DREF_CLKN DREF_CLKP DREF_SSCLKN DREF_SSCLKP NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11

PM

J23 J21 H22 F5 AD30 AE29 A24 A23 C37 D37 AP37 AN37 AP36 AP2 AP1 AN1 B1 A2 B37 A36 A37

18 I N T _ B L ON 18 I N T _ DIS P _ ON PM_EXTTS#0 PM_EXTTS#1 P L T RS T # _R 1 R 168 DOT 9 6 # D OT 9 6 D R E F S S CL K # D R E F S S CL K T P _ NC1 T P _ NC2 T P _ NC3 T P _ NC4 T P _ NC5 T P _ NC6 T P _ NC7 T P _ NC8 T P _ NC9 T P _ NC1 0 T P _ NC1 1 P M_ B MB US Y # 13 18 I _ E D I DCL K 18 I _ E D IDDA T A 2 1 0 0 /F T HE RMT RIP # 5 ,1 2 I M V P _ P W RGD 1 3 ,3 3 P L T RST# 1 2 ,1 3 ,2 0 ,3 1 ,3 2

LVDS

LCK

D OT 9 6 # 17 D OT 9 6 17 D R E F S S CL K # 17 D R E F S S CL K 17 T113 P A D * T111 P A D * T117 P A D * T115 P A D * T114 P A D * T112 P A D * T109 P A D * T107 P A D * T110 P A D * T106 P A D * T108 P A D *

18 INT _ T X L CL K OUT18 INT _ T X L CL K OUT+

1

R 173 * 4 0 .2 /F 2 2

1

18 INT _ T X L OUT018 INT _ T X L OUT118 INT _ T X L OUT218 INT _ T X L OUT0+ 18 INT _ T X L OUT1+ 18 INT _ T X L OUT2+ T6 T16 T30 T11 T15 T4

INT _ T X L OUT0INT _ T X L OUT1INT _ T X L OUT2INT _ T X L OUT0+ INT _ T X L OUT1+ INT _ T X L OUT2+

C 598 C 599

0 . 1 U_ 4 0 . 1 U_ 4

C

NC

C

Route as short as possible.

It's point to point, 55ohm trace, keep as short as possible. close Alviso.
1 .8 V S US

A L V IS O

1 .8 V S US 1

2

1

C 212 . 1 U/1 6 V _ 6

1 K /F _ 4 R 176 S M V RE F _ GMCH 1 K /F _ 4 R 1 81

+ 2 _ 5 V RUN R83 1 R82 1 1 0 K -0 402 2 1 0 K -0 402 2 PM_EXTTS#0 PM_EXTTS#1

R 189 8 0 .6 /F 2 M _ R C OMP N M _ RCOMP P 1 R 183 8 0 .6 /F 2 C 222 1 U /6 .3 V /X 5 R

System memory throttling using
D

D

PROJECT : ED3

Quanta Computer Inc.
Size D a te:
1 2 3 4 5 6

D o c u m e n t Nu mb e r

Alviso (VGA, DMI)
W e d n e sd a y, Ju n e 1 5 , 2 0 0 5
7

Rev A3A Sheet 8
8

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38

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1

2

3

4

5

6

7

8

M _ A _ D Q[0 ..6 3 ] 15 U 3 3B
A

M _ B _ D Q[0 ..6 3 ] 15 U 3 3G
A

B

C

M _ A _ DQ0 M _ A _ DQ1 M _ A _ DQ2 M _ A _ DQ3 M _ A _ DQ4 M _ A _ DQ5 M _ A _ DQ6 M _ A _ DQ7 M _ A _ DQ8 M _ A _ DQ9 M _ A _ DQ1 0 M _ A _ DQ1 1 M _ A _ DQ1 2 M _ A _ DQ1 3 M _ A _ DQ1 4 M _ A _ DQ1 5 M _ A _ DQ1 6 M _ A _ DQ1 7 M _ A _ DQ1 8 M _ A _ DQ1 9 M _ A _ DQ2 0 M _ A _ DQ2 1 M _ A _ DQ2 2 M _ A _ DQ2 3 M _ A _ DQ2 4 M _ A _ DQ2 5 M _ A _ DQ2 6 M _ A _ DQ2 7 M _ A _ DQ2 8 M _ A _ DQ2 9 M _ A _ DQ3 0 M _ A _ DQ3 1 M _ A _ DQ3 2 M _ A _ DQ3 3 M _ A _ DQ3 4 M _ A _ DQ3 5 M _ A _ DQ3 6 M _ A _ DQ3 7 M _ A _ DQ3 8 M _ A _ DQ3 9 M _ A _ DQ4 0 M _ A _ DQ4 1 M _ A _ DQ4 2 M _ A _ DQ4 3 M _ A _ DQ4 4 M _ A _ DQ4 5 M _ A _ DQ4 6 M _ A _ DQ4 7 M _ A _ DQ4 8 M _ A _ DQ4 9 M _ A _ DQ5 0 M _ A _ DQ5 1 M _ A _ DQ5 2 M _ A _ DQ5 3 M _ A _ DQ5 4 M _ A _ DQ5 5 M _ A _ DQ5 6 M _ A _ DQ5 7 M _ A _ DQ5 8 M _ A _ DQ5 9 M _ A _ DQ6 0 M _ A _ DQ6 1 M _ A _ DQ6 2 M _ A _ DQ6 3

AG35 AH35 AL35 AL37 AH36 AJ35 AK37 AL34 AM36 AN35 AP32 AM31 AM34 AM35 AL32 AM32 AN31 AP31 AN28 AP28 AL30 AM30 AM28 AL28 AP27 AM27 AM23 AM22 AL23 AM24 AN22 AP22 AM9 AL9 AL6 AP7 AP11 AP10 AL7 AM7 AN5 AN6 AN3 AP3 AP6 AM6 AL4 AM3 AK2 AK3 AG2 AG1 AL3 AM2 AH3 AG3 AF3 AE3 AD6 AC4 AF2 AF1 AD4 AD5

SADQ0 SADQ1 SADQ2 SADQ3 SADQ4 SADQ5 SADQ6 SADQ7 SADQ8 SADQ9 SADQ10 SADQ11 SADQ12 SADQ13 SADQ14 SADQ15 SADQ16 SADQ17 SADQ18 SADQ19 SADQ20 SADQ21 SADQ22 SADQ23 SADQ24 SADQ25 SADQ26 SADQ27 SADQ28 SADQ29 SADQ30 SADQ31 SADQ32 SADQ33 SADQ34 SADQ35 SADQ36 SADQ37 SADQ38 SADQ39 SADQ40 SADQ41 SADQ42 SADQ43 SADQ44 SADQ45 SADQ46 SADQ47 SADQ48 SADQ49 SADQ50 SADQ51 SADQ52 SADQ53 SADQ54 SADQ55 SADQ56 SADQ57 SADQ58 SADQ59 SADQ60 SADQ61 SADQ62 SADQ63
A L V IS O

SA_BS0# SA_BS1# SA_BS2# SA_DM0 SA_DM1 SA_DM2 SA_DM3 SA_DM4 SA_DM5 SA_DM6 SA_DM7 SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7 SA_DQS0# SA_DQS1# SA_DQS2# SA_DQS3# SA_DQS4# SA_DQS5# SA_DQS6# SA_DQS7# SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8 SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13

AK15 AK16 AL21 AJ37 AP35 AL29 AP24 AP9 AP4 AJ2 AD3 AK36 AP33 AN29 AP23 AM8 AM4 AJ1 AE5 AK35 AP34 AN30 AN23 AN8 AM5 AH1 AE4 AL17 AP17 AP18 AM17 AN18 AM18 AL19 AP20 AM19 AL20 AM16 AN20 AM20 AM15 AN15 AP16 AF29 AF28 AP15

M_ A _ B S #0 M_ A _ B S #1 M_ A _ B S #2 M _ A _ DM0 M _ A _ DM1 M _ A _ DM2 M _ A _ DM3 M _ A _ DM4 M _ A _ DM5 M _ A _ DM6 M _ A _ DM7 M _ A _ DQS 0 M _ A _ DQS 1 M _ A _ DQS 2 M _ A _ DQS 3 M _ A _ DQS 4 M _ A _ DQS 5 M _ A _ DQS 6 M _ A _ DQS 7 M _ A _ DQS # 0 M _ A _ DQS # 1 M _ A _ DQS # 2 M _ A _ DQS # 3 M _ A _ DQS # 4 M _ A _ DQS # 5 M _ A _ DQS # 6 M _ A _ DQS # 7 M_ A _ A0 M_ A _ A1 M_ A _ A2 M_ A _ A3 M_ A _ A4 M_ A _ A5 M_ A _ A6 M_ A _ A7 M_ A _ A8 M_ A _ A9 M_ A _ A 10 M_ A _ A 11 M_ A _ A 12 M_ A _ A 13 M _ A _ CA S # M _ A _ RA S # T139 T141 M _A_WE#

M_ A _ B S #0 1 5 ,1 6 M_ A _ B S #1 1 5 ,1 6 M_ A _ B S #2 1 5 ,1 6 M _ A _ DM[0 ..7 ] 15

M _ A _ D QS [0 ..7 ] 15

M _ A _ DQS # [0 ..7 ] 15

M _ A _ A [0 ..1 3 ] 1 5 ,1 6

SA_CAS# SA_RAS# SA_RCVENIN# SA_RCVENOUT# SA_WE#

M _ A _ CA S # 1 5 ,1 6 M _ A _ RA S # 1 5 ,1 6 M _ A _ W E # 1 5 ,1 6

M _ B _ DQ0 M _ B _ DQ1 M _ B _ DQ2 M _ B _ DQ3 M _ B _ DQ4 M _ B _ DQ5 M _ B _ DQ6 M _ B _ DQ7 M _ B _ DQ8 M _ B _ DQ9 M _ B _ DQ1 0 M _ B _ DQ1 1 M _ B _ DQ1 2 M _ B _ DQ1 3 M _ B _ DQ1 4 M _ B _ DQ1 5 M _ B _ DQ1 6 M _ B _ DQ1 7 M _ B _ DQ1 8 M _ B _ DQ1 9 M _ B _ DQ2 0 M _ B _ DQ2 1 M _ B _ DQ2 2 M _ B _ DQ2 3 M _ B _ DQ2 4 M _ B _ DQ2 5 M _ B _ DQ2 6 M _ B _ DQ2 7 M _ B _ DQ2 8 M _ B _ DQ2 9 M _ B _ DQ3 0 M _ B _ DQ3 1 M _ B _ DQ3 2 M _ B _ DQ3 3 M _ B _ DQ3 4 M _ B _ DQ3 5 M _ B _ DQ3 6 M _ B _ DQ3 7 M _ B _ DQ3 8 M _ B _ DQ3 9 M _ B _ DQ4 0 M _ B _ DQ4 1 M _ B _ DQ4 2 M _ B _ DQ4 3 M _ B _ DQ4 4 M _ B _ DQ4 5 M _ B _ DQ4 6 M _ B _ DQ4 7 M _ B _ DQ4 8 M _ B _ DQ4 9 M _ B _ DQ5 0 M _ B _ DQ5 1 M _ B _ DQ5 2 M _ B _ DQ5 3 M _ B _ DQ5 4 M _ B _ DQ5 5 M _ B _ DQ5 6 M _ B _ DQ5 7 M _ B _ DQ5 8 M _ B _ DQ5 9 M _ B _ DQ6 0 M _ B _ DQ6 1 M _ B _ DQ6 2 M _ B _ DQ6 3

AE31 AE32 AG32 AG36 AE34 AE33 AF31 AF30 AH33 AH32 AK31 AG30 AG34 AG33 AH31 AJ31 AK30 AJ30 AH29 AH28 AK29 AH30 AH27 AG28 AF24 AG23 AJ22 AK22 AH24 AH23 AG22 AJ21 AG10 AG9 AG8 AH8 AH11 AH10 AJ9 AK9 AJ7 AK6 AJ4 AH5 AK8 AJ8 AJ5 AK4 AG5 AG4 AD8 AD9 AH4 AG6 AE8 AD7 AC5 AB8 AB6 AA8 AC8 AC7 AA4 AA5

SBDQ0 SBDQ1 SBDQ2 SBDQ3 SBDQ4 SBDQ5 SBDQ6 SBDQ7 SBDQ8 SBDQ9 SBDQ10 SBDQ11 SBDQ12 SBDQ13 SBDQ14 SBDQ15 SBDQ16 SBDQ17 SBDQ18 SBDQ19 SBDQ20 SBDQ21 SBDQ22 SBDQ23 SBDQ24 SBDQ25 SBDQ26 SBDQ27 SBDQ28 SBDQ29 SBDQ30 SBDQ31 SBDQ32 SBDQ33 SBDQ34 SBDQ35 SBDQ36 SBDQ37 SBDQ38 SBDQ39 SBDQ40 SBDQ41 SBDQ42 SBDQ43 SBDQ44 SBDQ45 SBDQ46 SBDQ47 SBDQ48 SBDQ49 SBDQ50 SBDQ51 SBDQ52 SBDQ53 SBDQ54 SBDQ55 SBDQ56 SBDQ57 SBDQ58 SBDQ59 SBDQ60 SBDQ61 SBDQ62 SBDQ63
A L V IS O

SB_BS0# SB_BS1# SB_BS2# SB_DM0 SB_DM1 SB_DM2 SB_DM3 SB_DM4 SB_DM5 SB_DM6 SB_DM7 SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7 SB_DQS0# SB_DQS1# SB_DQS2# SB_DQS3# SB_DQS4# SB_DQS5# SB_DQS6# SB_DQS7# SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8 SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13

AJ15 AG17 AG21 AF32 AK34 AK27 AK24 AJ10 AK5 AE7 AB7 AF34 AK32 AJ28 AK23 AM10 AH6 AF8 AB4 AF35 AK33 AK28 AJ23 AL10 AH7 AF7 AB5 AH17 AK17 AH18 AJ18 AK18 AJ19 AK19 AH19 AJ20 AH20 AJ16 AG18 AG20 AG15 AH14 AK14 AF15 AF14 AH16

M_ B _ B S #0 M_ B _ B S #1 M_ B _ B S #2 M _ B _ DM0 M _ B _ DM1 M _ B _ DM2 M _ B _ DM3 M _ B _ DM4 M _ B _ DM5 M _ B _ DM6 M _ B _ DM7 M _ B _ DQS 0 M _ B _ DQS 1 M _ B _ DQS 2 M _ B _ DQS 3 M _ B _ DQS 4 M _ B _ DQS 5 M _ B _ DQS 6 M _ B _ DQS 7 M _ B _ DQS # 0 M _ B _ DQS # 1 M _ B _ DQS # 2 M _ B _ DQS # 3 M _ B _ DQS # 4 M _ B _ DQS # 5 M _ B _ DQS # 6 M _ B _ DQS # 7 M_ B _ A0 M_ B _ A1 M_ B _ A2 M_ B _ A3 M_ B _ A4 M_ B _ A5 M_ B _ A6 M_ B _ A7 M_ B _ A8 M_ B _ A9 M_ B _ A 10 M_ B _ A 11 M_ B _ A 12 M_ B _ A 13 M _ B _ CA S # M _ B _ RA S # T140 T142 M _B_WE#

M_ B _ B S #0 1 5 ,1 6 M_ B _ B S #1 1 5 ,1 6 M_ B _ B S #2 1 5 ,1 6 M _ B _ DM[0 ..7 ] 15

M _ B _ D QS [0 ..7 ] 15

M _ B _ DQS # [0 ..7 ] 15

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY B

B

M _ B _ A [0 ..1 3 ] 1 5 ,1 6

SB_CAS# SB_RAS# SB_RCVENIN# SB_RCVENOUT# SB_WE#

M _ B _ CA S # 1 5 ,1 6 M _ B _ RA S # 1 5 ,1 6 M _ B _ W E # 1 5 ,1 6

C

D

D

PROJECT : ED3

Quanta Computer Inc.
S ize D o c u m e n t Nu mb e r

Alviso (DDR)
D a te:
1 2 3 4 5 6

R ev A3A Sheet 9
8

W e d n e s d a y, Ju n e 1 5 , 2 0 0 5
7

of

38

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5

4

3

2

1

+ V C CP

3900mA
1 1 1 1 1

2

2

2

2

2

2

C 162 C 185 C 189 C 186 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 1 0 U_ 6 .3 V _ 8

C 169 1 0 U_ 6 .3 V _ 8

C 1 64 1 0 U_ 6 .3 V _ 8

D

2

2

2

1

C 125 . 1 U/1 0 V _ 4 2

1

1 B L M1 1 A 121S

V C CA _ DP L L A + C 110 4 7 0 U_ 2 .5 V

2

L23

U33H A L V IS O

C

L22 2 1 1 B L M1 1 A 121S 1 V C CA _ DP L L B C 123 . 1 U/1 0 V _ 4 2 + C 101 4 7 0 U_ 2 .5 V

L44 2 1 1 B L M1 1 A 121S 1 V C C A _ HP L L C 195 . 1 U/1 0 V _ 4 2 + C 204 4 7 0 U_ 2 .5 V V C C A _ C R T DA C_ R

AC2 AC1 B23 C35 AA1 AA2 F19 E19 G19 H20

VCCH_MPLL1 VCCH_MPLL0 VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_MPLL VCCA_CRTDAC0 VCCA_CRTDAC1 VSSA_CRTDAC VCC_SYNC VTT0 VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9 VTT10 VTT11 VTT12 VTT13 VTT14 VTT15 VTT16 VTT17 VTT18 VTT19 VTT20 VTT21 VTT22 VTT23 VTT24 VTT25 VTT26 VTT27 VTT28 VTT29 VTT30 VTT31 VTT32 VTT33 VTT34 VTT35 VTT36 VTT37 VTT38 VTT39 VTT40 VTT41 VTT42 VTT43 VTT44 VTT45 VTT46 VTT47 VTT48 VTT49 VTT50 VTT51

L45 2 1 1 B L M1 1 A 121S 1 V CCA _ MP L L C 196 . 1 U/1 0 V _ 4 2 + C 190 4 7 0 U_ 2 .5 V

B

1

+ 2 _ 5 V RUN 1 D15 + V CCP 2 R B751V 1 2 10_4 R77 1 2 C 90 . 1 U/1 0 V _ 4

V C C A _ C RT DA C 1 C 91 .0 2 2 U/1 6 V _ 4

1

2

2

C 564 1 5 0 U_ 4 V _ 1 .9 H

2

+ 2 _ 5 V RUN

VCCTX_LVDS0 VCCTX_LVDS1 VCCTX_LVDS2 VCCA_SM0 VCCA_SM1 VCCA_SM2 VCCA_SM3 VCC3G0 VCC3G1 VCC3G2 VCC3G3 VCC3G4 VCC3G5 VCC3G6 VCCA_3GPLL0 VCCA_3GPLL1 VCCA_3GPLL2 VCCA_3GBG VSSA_3GBG

B28 A28 A27 AF20 AP19 AF19 AF18 AE37 W37 U37 R37 N37 L37 J37 Y29 Y28 Y27 F37 G37 V C C _ D D R D LL

+ 2 _ 5 V RUN 1 1 V C C A _ 3 GB G C 117 4 .7 U/1 0 V _ 8 V S S A _ 3 GBG V C C 3 G_ P CIE 1 C 124 . 1 U/1 0 V _ 4 C 146 . 1 U/1 0 V _ 4 + 2 _ 5 V RUN

2

2

1

C 126 . 1 U/1 0 V _ 4

+ V C CP C 1 1 4 . 4 7 U/1 0 V _ 6 V C C P _ GMCH_ CA P 1 1 2

A

2

2

2

V 1 . 8 _ DDR_ CA P 6 V 1 . 8 _ DDR_ CA P 3 V 1 . 8 _ DDR_ CA P 4

C 2 0 8 . 1 U/1 0 V _ 4 1 2

0 . 5 /F C 191 C 205 . 1 U/1 0 V _ 4 1 0 U_ 6 .3 V _ 8

1

+

+ V CCP C 1 2 0 . 4 7 U/1 0 V _ 6 1 2 C 182 4 .7 U/1 0 V _ 8 C 4 3 1 . 2 2 U/6 .3 V V6 C P _ GMCH_ CA P 2 _C V C C P _ GMCH_ CA P 3 1 2 C 1 5 3 . 2 2 U/6 .3 V _ 6 V C C P _ GMCH_ CA P 4 1 2
5 4

2

2

C 1 63 2 . 2 U/6 .3 V

K13 J13 K12 W11 V11 U11 T11 R11 P11 N11 M11 L11 K11 W10 V10 U10 T10 R10 P10 N10 M10 K10 J10 Y9 W9 U9 R9 P9 N9 M9 L9 J9 N8 M8 N7 M7 N6 M6 A6 N5 M5 N4 M4 N3 M3 N2 M2 B2 V1 N1 M1 G1

VCCSM0 VCCSM1 VCCSM2 VCCSM3 VCCSM4 VCCSM5 VCCSM6 VCCSM7 VCCSM8 VCCSM9 VCCSM10 VCCSM11 VCCSM12 VCCSM13 VCCSM14 VCCSM15 VCCSM16 VCCSM17 VCCSM18 VCCSM19 VCCSM20 VCCSM21 VCCSM22 VCCSM23 VCCSM24 VCCSM25 VCCSM26 VCCSM27 VCCSM28 VCCSM29 VCCSM30 VCCSM31 VCCSM32 VCCSM33 VCCSM34 VCCSM35 VCCSM36 VCCSM37 VCCSM38 VCCSM39 VCCSM40 VCCSM41 VCCSM42 VCCSM43 VCCSM44 VCCSM45 VCCSM46 VCCSM47 VCCSM48 VCCSM49 VCCSM50 VCCSM51 VCCSM52 VCCSM53 VCCSM54 VCCSM55 VCCSM56 VCCSM57 VCCSM58 VCCSM59 VCCSM60 VCCSM61 VCCSM62 VCCSM63 VCCSM64

2

2

. 0 1 U/1 6 V _ 4

C 122 . 1 U/1 0 V _ 4 V C C_ T V B G_ R + 2 _ 5 V RUN R86 1 0_4 2

2

+ 1 _ 5 V RUN

T29 R29 N29 M29 K29 J29 V28 U28 T28 R28 P28 N28 M28 L28 K28 J28 H28 G28 V27 U27 T27 R27 P27 N27 M27 L27 K27 J27 H27 K26 H26 K25 J25 K24 K23 K22 K21 W20 U20 T20 K20 V19 U19 K19 W18 V18 T18 K18 K17

VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48

VCCA_TVDACA0 VCCA_TVDACA1 VCCA_TVDACB0 VCCA_TVDACB1 VCCA_TVDACC0 VCCA_TVDACC1 VCCA_TVBG VSSA_TVBG VCCD_TVDAC VCCDQ_TVDAC VCCD_LVDS0 VCCD_LVDS1 VCCD_LVDS2 VCCA_LVDS VCCHV0 VCCHV1 VCCHV2

2

H18 G18 D19 H17 B26 B25 A25 A35 B22 B21 A21

V C C_ T V B G_ R V S S _ TVBG V C C D _ T V DA C_ R V C C Q _ T V DA C_ R + 1 _ 5 V RUN 1 C 202 C 203 . 1 U/1 0 V _ 4 1 0 U_ 6 .3 V _ 8 2 V C C _ T V DA CC_ R + 2 _ 5 V RUN 1 C 154 1 R 91 1 0_4 2 1 L15 V C C _ T V DA CC C 1 08 1 2 1 B L M1 8 P G1 8 1 SN1 + 3 V R UN 1 V C C _ T V DA CB _ R R 92 1 0_4 2 1 L16 V C C _ T V DA CB C 1 19 1 2 1 B L M1 8 P G1 8 1 SN1 + 3 V R UN

2

2

AM37 AH37 AP29 AD28 AD27 AC27 AP26 AN26 AM26 AL26 AK26 AJ26 AH26 AG26 AF26 AE26 AP25 AN25 AM25 AL25 AK25 AJ25 AH25 AG25 AF25 AE25 AE24 AE23 AE22 AE21 AE20 AE19 AE18 AE17 AE16 AE15 AE14 AP13 AN13 AM13 AL13 AK13 AJ13 AH13 AG13 AF13 AE13 AP12 AN12 AM12 AL12 AK12 AJ12 AH12 AG12 AF12 AE12 AD11 AC11 AB11 AB10 AB9 AP8 AM1 AE1

C 1 09 . 0 2 2 U/1 6 V _ 4 . 1 U/1 0 V _ 4 L19 V CC_ T V B G 2

2

C 1 18 . 0 2 2 U/1 6 V _ 4 . 1 U/1 0 V _ 4

2

F17 E17 D18 C18 F18 E18

V C C _ T V DA CA _ R V C C _ T V DA CA _ R V C C _ T V DA CB _ R V C C _ T V DA CC_ R

R 90 1

0_4 2 1

L20 V C C _ T V DA CA C 1 07 1 2 1 B L M1 8 P G1 8 1 SN1 + 3 V R UN

C 1 06 . 0 2 2 U/1 6 V _ 4 . 1 U/1 0 V _ 4

1

D

1

C97

2

C 121 C 112 . 1 U/1 0 V _ 4 1 0 U_ 6 .3 V _ 8

V S S _ TVBG

2

C96 . 0 2 2 U/1 6 V _ 4 . 1 U/1 0 V _ 4

1

1

1

1 B L M1 8 P G1 8 1 SN1

+ 3 V R UN

R 76 2 1 V 1 . 8 _ DDR_ CA P 1 V 1 . 8 _ DDR_ CA P 2 V 1 . 8 _ DDR_ CA P 5 C 2 2 7 . 1 U/1 0 V _ 4 1 2 C 2 2 3 . 1 U/1 0 V _ 4 1 2 C 2 2 9 . 1 U/1 0 V _ 4 1 2 V C C Q _ T V DA C_ R Note: All VCCSM pins shorted internally. 1 .8 V S US R 85 1 0_4 2 1 V C C D _ T V DA C_ R R 79 1 0_4 2 1 V C C D _ T V DA C C95 C94 . 0 2 2 U/1 6 V _ 4 . 1 U/1 0 V _ 4 2 L18 V C C Q _ T V DA C C92 1 2 1 B L M1 8 P G1 8 1 SN1 2 1

10_4 1

+ 3 V R UN

2

POWER

D 14 RB 7 5 1 V

C

2

+ 1 _ 5 V RUN

2

2

1

1

1

+ 2 2 2 2 C 201 1 0 U_ 6 .3 V _ 8 C 230 1 0 U_ 6 .3 V _ 8 C 557 3 3 0 U_ 4 V _ 2 .8 H

1

+ C 558 3 3 0 U_ 4 V _ 2 .8 H

2

2

C93 . 0 2 2 U/1 6 V _ 4 . 1 U/1 0 V _ 4

L32 V C C _ D D R D LL 1 + C 231 1 0 0 U/1 0 V 2 1 2 1 + 1 _ 5 V RUN B L M1 8 P G1 8 1 SN1

2

2

C 209 . 1 U/1 0 V _ 4 V C C 3 G_ P CIE L25 1
B

V C C 3 G_ P CIE Note: All VCCSM pins shorted internally. C 228 1 . 1 U/1 0 V _ 4 2 V CCA _ 3 GP L L 1 1

2

1 + 1 _ 5 V RUN B L M1 8 P G1 8 1 SN1

2

2

R 165 C 2 2 6 . 1 U/1 0 V _ 4 1 2 1 2 V C CA _ 3 GP L L _ R 2

2

+ C 187 C 148 C 165 1 0 U_ 6 .3 V _ 81 0 U_ 6 .3 V _ 82 2 0 U_ 4 V _L L28 1 + 1 _ 5 V RUN B L M1 8 P G1 8 1 SN1

A

V CCA _ 3 GP L L

PROJECT : ED3
V C C A _ 3 GB G V S S A _ 3 GBG Size D a te:

1

1

Quanta Computer Inc.
D o c u m e n t Nu mb e r

Alviso (Power)
F r i d a y, Ju n e 1 7 , 2 0 0 5 Sheet
1

Rev A3A 10 of 38

3

2

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A

B

C

VSSALVDS

D

B36

5 4

5 4

U33D A L V IS O

NCTF

PDF created with pdfFactory trial version www.pdffactory.com
U 33E A L V IS O

VSS

3

3

L17 M17 N17 P17 T17 U17 V17 W17 L18 M18 N18 P18 R18 Y18 L19 M19 N19 P19 R19 Y19 L20 M20 N20 P20 R20 Y20 L21 M21 N21 P21 T21 U21 V21 W21 L22 M22 N22 P22 R22 T22 U22 V22 W22 L23 M23 N23 P23 R23 T23 U23 V23 W23 L24 M24 N24 P24 R24 T24 U24 V24 W24 L25 M25 N25 P25 R25 T25 U25 V25 W25 L26 M26 N26 P26 R26 T26 U26 V26 W26 VCC_NCTF78 VCC_NCTF77 VCC_NCTF76 VCC_NCTF75 VCC_NCTF74 VCC_NCTF73 VCC_NCTF72 VCC_NCTF71 VCC_NCTF70 VCC_NCTF69 VCC_NCTF68 VCC_NCTF67 VCC_NCTF66 VCC_NCTF65 VCC_NCTF64 VCC_NCTF63 VCC_NCTF62 VCC_NCTF61 VCC_NCTF60 VCC_NCTF59 VCC_NCTF58 VCC_NCTF57 VCC_NCTF56 VCC_NCTF55 VCC_NCTF54 VCC_NCTF53 VCC_NCTF52 VCC_NCTF51 VCC_NCTF50 VCC_NCTF49 VCC_NCTF48 VCC_NCTF47 VCC_NCTF46 VCC_NCTF45 VCC_NCTF44 VCC_NCTF43 VCC_NCTF42 VCC_NCTF41 VCC_NCTF40 VCC_NCTF39 VCC_NCTF38 VCC_NCTF37 VCC_NCTF36 VCC_NCTF35 VCC_NCTF34 VCC_NCTF33 VCC_NCTF32 VCC_NCTF31 VCC_NCTF30 VCC_NCTF29 VCC_NCTF28 VCC_NCTF27 VCC_NCTF26 VCC_NCTF25 VCC_NCTF24 VCC_NCTF23 VCC_NCTF22 VCC_NCTF21 VCC_NCTF20 VCC_NCTF19 VCC_NCTF18 VCC_NCTF17 VCC_NCTF16 VCC_NCTF15 VCC_NCTF14 VCC_NCTF13 VCC_NCTF12 VCC_NCTF11 VCC_NCTF10 VCC_NCTF9 VCC_NCTF8 VCC_NCTF7 VCC_NCTF6 VCC_NCTF5 VCC_NCTF4 VCC_NCTF3 VCC_NCTF2 VCC_NCTF1 VCC_NCTF0 + V CCP VSS_NCTF68 VSS_NCTF67 VSS_NCTF66 VSS_NCTF65 VSS_NCTF64 VSS_NCTF63 VSS_NCTF62 VSS_NCTF61 VSS_NCTF60 VSS_NCTF59 VSS_NCTF58 VSS_NCTF57 VSS_NCTF56 VSS_NCTF55 VSS_NCTF54 VSS_NCTF53 VSS_NCTF52 VSS_NCTF51 VSS_NCTF50 VSS_NCTF49 VSS_NCTF48 VSS_NCTF47 VSS_NCTF46 VSS_NCTF45 VSS_NCTF44 VSS_NCTF43 VSS_NCTF42 VSS_NCTF41 VSS_NCTF40 VSS_NCTF39 VSS_NCTF38 VSS_NCTF37 VSS_NCTF36 VSS_NCTF35 VSS_NCTF34 VSS_NCTF33 VSS_NCTF32 VSS_NCTF31 VSS_NCTF30 VSS_NCTF29 VSS_NCTF28 VSS_NCTF27 VSS_NCTF26 VSS_NCTF25 VSS_NCTF24 VSS_NCTF23 VSS_NCTF22 VSS_NCTF21 VSS_NCTF20 VSS_NCTF19 VSS_NCTF18 VSS_NCTF17 VSS_NCTF16 VSS_NCTF15 VSS_NCTF14 VSS_NCTF13 VSS_NCTF12 VSS_NCTF11 VSS_NCTF10 VSS_NCTF9 VSS_NCTF8 VSS_NCTF7 VSS_NCTF6 VSS_NCTF5 VSS_NCTF4 VSS_NCTF3 VSS_NCTF2 VSS_NCTF1 VSS_NCTF0

Y12 AA12 Y13 AA13 L14 M14 N14 P14 R14 T14 U14 V14 W14 Y14 AA14 AB14 L15 M15 N15 P15 R15 T15 U15 V15 W15 Y15 AA15 AB15 L16 M16 N16 P16 R16 T16 U16 V16 W16 Y16 AA16 AB16 R17 Y17 AA17 AB17 AA18 AB18 AA19 AB19 AA20 AB20 R21 Y21 AA21 AB21 Y22 AA22 AB22 Y23 AA23 AB23 Y24 AA24 AB24 Y25 AA25 AB25 Y26 AA26 AB26

2

2

VTT_NCTF17 VTT_NCTF16 VTT_NCTF15 VTT_NCTF14 VTT_NCTF13 VTT_NCTF12 VTT_NCTF11 VTT_NCTF10 VTT_NCTF9 VTT_NCTF8 VTT_NCTF7 VTT_NCTF6 VTT_NCTF5 VTT_NCTF4 VTT_NCTF3 VTT_NCTF2 VTT_NCTF1 VTT_NCTF0

L12 M12 N12 P12 R12 T12 U12 V12 W12 L13 M13 N13 P13 R13 T13 U13 V13 W13

+ V C CP

Size D o c u m e n t Nu mb e r T u e sd a y, Ju n e 1 4 , 2 0 0 5 Sheet
1

DDRI is 2.5V, DDRII is 1.8V.

D a te:

AB12 AC12 AD12 AB13 AC13 AD13 AC14 AD14 AC15 AD15 AC16 AD16 AC17 AD17 AC18 AD18 AC19 AD19 AC20 AD20 AC21 AD21 AC22 AD22 AC23 AD23 AC24 AD24 AC25 AD25 AC26 AD26 1 .8 V S US

VCCSM_NCTF31 VCCSM_NCTF30 VCCSM_NCTF29 VCCSM_NCTF28 VCCSM_NCTF27 VCCSM_NCTF26 VCCSM_NCTF25 VCCSM_NCTF24 VCCSM_NCTF23 VCCSM_NCTF22 VCCSM_NCTF21 VCCSM_NCTF20 VCCSM_NCTF19 VCCSM_NCTF18 VCCSM_NCTF17 VCCSM_NCTF16 VCCSM_NCTF15 VCCSM_NCTF14 VCCSM_NCTF13 VCCSM_NCTF12 VCCSM_NCTF11 VCCSM_NCTF10 VCCSM_NCTF9 VCCSM_NCTF8 VCCSM_NCTF7 VCCSM_NCTF6 VCCSM_NCTF5 VCCSM_NCTF4 VCCSM_NCTF3 VCCSM_NCTF2 VCCSM_NCTF1 VCCSM_NCTF0

Alviso (VSS, NCTF0
11 of 38

1

PROJECT : ED3

B24 D24 F24 J24 AG24 AJ24 E27 G27 W27 AA27 AB27 AF27 AG27 AJ27 AL27 AN27 E28 W28 AA28 AB28 AC28 A29 D29 E29 F29 G29 H29 L29 P29 U29 V29 W29 AA29 AD29 AG29 AJ29 AM29 C30 Y30 AA30 AB30 AC30 AE30 AP30 D31 E31 F31 G31 H31 J31 K31 L31 M31 N31 P31 R31 T31 U31 V31 W31 AD31 AG31 AL31 A32 C32 Y32 AA32 AB32 AC32 AD32 AJ32 AN32 D33 E33 F33 G33 H33 J33 K33 L33 M33 N33 P33 R33 T33 U33 V33 W33 AD33 AF33 AL33 C34 AA34 AB34 AC34 AD34 AH34 AN34 B35 D35 E35 F35 G35 H35 J35 K35 L35 M35 N35 P35 R35 T35 U35 V35 W35 Y35 AE35 C36 AA36 AB36 AC36 AD36 AE36 AF36 AJ36 AL36 AN36 E37 H37 K37 M37 P37 T37 V37 Y37 AG37 VSS135 VSS134 VSS133 VSS132 VSS131 VSS130 VSS129 VSS128 VSS127 VSS126 VSS125 VSS124 VSS123 VSS122 VSS121 VSS120 VSS119 VSS118 VSS117 VSS116 VSS115 VSS114 VSS113 VSS112 VSS111 VSS110 VSS109 VSS108 VSS107 VSS106 VSS105 VSS104 VSS103 VSS102 VSS101 VSS100 VSS99 VSS98 VSS97 VSS96 VSS95 VSS94 VSS93 VSS92 VSS91 VSS90 VSS89 VSS88 VSS87 VSS86 VSS85 VSS84 VSS83 VSS82 VSS81 VSS80 VSS79 VSS78 VSS77 VSS76 VSS75 VSS74 VSS73 VSS72 VSS71 VSS70 VSS69 VSS68 VSS67 VSS66 VSS65 VSS64 VSS63 VSS62 VSS61 VSS60 VSS59 VSS58 VSS57 VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34 VSS33 VSS32 VSS31 VSS30 VSS29 VSS28 VSS27 VSS26 VSS25 VSS24 VSS23 VSS22 VSS21 VSS20 VSS19 VSS18 VSS17 VSS16 VSS15 VSS14 VSS13 VSS12 VSS11 VSS10 VSS9 VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1 VSS0 VSS271 VSS270 VSS269 VSS268 VSS267 VSS266 VSS265 VSS264 VSS263 VSS262 VSS261 VSS260 VSS259 VSS258 VSS257 VSS256 VSS255 VSS254 VSS253 VSS252 VSS251 VSS250 VSS249 VSS248 VSS247 VSS246 VSS245 VSS244 VSS243 VSS242 VSS241 VSS240 VSS239 VSS238 VSS237 VSS236 VSS235 VSS234 VSS233 VSS232 VSS231 VSS230 VSS229 VSS228 VSS227 VSS226 VSS225 VSS224 VSS223 VSS222 VSS221 VSS220 VSS219 VSS218 VSS217 VSS216 VSS215 VSS214 VSS213 VSS212 VSS211 VSS210 VSS209 VSS208 VSS207 VSS206 VSS205 VSS204 VSS203 VSS202 VSS201 VSS200 VSS199 VSS198 VSS197 VSS196 VSS195 VSS194 VSS193 VSS192 VSS191 VSS190 VSS189 VSS188 VSS187 VSS186 VSS185 VSS184 VSS183 VSS182 VSS181 VSS180 VSS179 VSS178 VSS177 VSS176 VSS175 VSS174 VSS173 VSS172 VSS171 VSS170 VSS169 VSS168 VSS167 VSS166 VSS165 VSS164 VSS163 VSS162 VSS161 VSS160 VSS159 VSS158 VSS157 VSS156 VSS155 VSS154 VSS153 VSS152 VSS151 VSS150 VSS149 VSS148 VSS147 VSS146 VSS145 VSS144 VSS143 VSS142 VSS141 VSS140 VSS139 VSS138 VSS137 VSS136

Y1 D2 G2 J2 AL24 AN24 A26 E26 G26 J26 B27 L2 P2 T2 V2 AD2 AE2 AH2 AL2 AN2 A3 C3 AA3 AB3 AC3 AJ3 C4 H4 L4 P4 U4 Y4 AF4 AN4 E5 W5 AL5 AP5 B6 J6 L6 P6 T6 AA6 AC6 AE6 AJ6 G7 V7 AA7 AG7 AK7 AN7 C8 E8 L8 P8 Y8 AL8 A9 H9 K9 T9 V9 AA9 AC9 AE9 AH9 AN9 D10 L10 Y10 AA10 F11 H11 Y11 AA11 AF11 AG11 AJ11 AL11 AN11 B12 D12 J12 A14 B14 F14 J14 K14 AG14 AJ14 AL14 AN14 C15 K15 A16 D16 H16 K16 AL16 C17 G17 AF17 AJ17 AN17 A18 B18 U18 AL18 C19 H19 J19 T19 W19 AG19 AN19 A20 D20 E20 F20 G20 V20 AK20 C21 F21 AF21 AN21 A22 D22 E22 J22 AH22 AL22 H23 AF23

Quanta Computer Inc.
Rev A3A

C

D

A

B

1

2

3

4

5

6

7

8

V CCRTC R 221 1 1 8 2 K /F R 211 1M 2

2

2

C 233 1 15P 2 1

P CI P u l l u p s CL K _ 3 2KX1 R 2 05 1 0 M_4 1 U 35A Y1 Y2 AA2 RTCX1 RTCX2 RTCRST# INTRUDER# INTVRMEN LAD0 LAD1/FB1 LAD2/FB2 LAD3/FB3 LDRQ0# LDRQ1#/GPI41 LFRAME# P2 N3 N5 N4 N6 P4 P3 L A D 0 / F W H0 L A D 1 / F W H1 L A D 2 / F W H2 L A D 3 / F W H3 L P C _ DRQ0 # L P C _ DRQ1 # L F R A ME # /F W H4 L A D 0 / F W H0 3 1 ,3 2 L A D 1 / F W H1 3 1 ,3 2 L A D 2 / F W H2 3 1 ,3 2 L A D 3 / F W H3 3 1 ,3 2 L P C _ DRQ0 # 31 L P C _ DRQ1 # 32 L F R A ME # /F W H4 3 1 ,3 2 + V CCP P I R Q D# S T OP# P I RQA # P I R Q C# + 3 V R UN L P C _ DRQ0 # L P C _ DRQ1 # R 6 52 R 6 53 1 0 K _4 1 0 K _4 + 3 V R UN R C IN# S E R I RQ GA T E A20 IR Q 14 6 7 8 9 10 8 .2 KX8 R P11 6 7 8 9 10 8 .2 KX8 T HE RMT RIP # 5 ,8 S MI# 5 S T P CL K# 5 C P US L P # 5 ,7 DP S L P # 5 D P RS T P # 5 2 56_4 + V C CP R309 Dothan A Dothan B Yonah Installed NC Installed R308 Installed NC NC + 3 V R UN 5 4 3 2 1 8 .2 KX8 REQ0 : LAN REQ1 : 1394/CARDBUS P L OCK # R E Q6 # R E Q1 # I C H _ G P IO2 5 4 3 2 1 + 3 V R UN P I RQB # R E Q2 # TRDY # F RA ME # R P13 1 3 ,2 1 ,2 4 ,3 1 ,3 2 S E R I R Q 5 4 3 2 1 + 3 V R UN IR DY # R E Q3 # DE V S E L # P E R R#

3 2 .7 6 8 K HZ W1 3 4 1

+ 3 V R UN

2

R T C_ RS T # S M _ I N T RUDE R# 1 JP5 *S HORT PAD 5 N MI 5 A 2 0 M# 5 F E R R# 5 IG NNE # 5 I NTR 5 C P U I N IT # 32 R C I N # 32 GA T E A20 F E R R # R 199 1 2 56_4

A

AA3 AA5

LPC

C 253 . 1 U/1 0 V _ 4

2

C 232 1 15P

CL K _ 3 2KX2

RTC

R 198 7 5 /F _ 4

A

R C IN# GA T E A20

AF25 AF23 R _ F E R R# AF24 AG26 AG24 AF27 AD23 AF22

RTC
D20 +3 V A L W 2 1 * R B 5 0 0 V _ NC R 298 R _ 3 V RT C 2 1 K -0 603 R T C _ N0 2 D21 1 R B500V

NMI A20M# FERR# IGNNE# INTR INIT# RCIN# A20GATE

CPU

CPUPWRGD/GPO49 INIT3_3V# THRMTRIP# SMI# STPCLK# CPUSLP# DPSLP#/TP[2] DPRSLP#/TP[4]

AG25 AE22 AE23 AG27 AE26 AE27 AD27 AE24

2

C P UP W RGD T H E R M T RIP # _ ICH R _ C P US L P # R 208 R 200

< 2"
CP UP W RGD 5 R 201 56_4 2 * 0 _ NC 2 0_4 D P RS T P # R 197 1

1 1

V CCRTC C 397 . 1 U/1 0 V _ 4 C 396 1 U/1 0 V _ 6

R 296
B

1

3

R T C _ N0 1 3K_6 R 297 4 .7 K _6

+5 V A L W

2

Q34 P MB S 3904

3.8V 3.1V
C 398 2 . 1 U/1 0 V _ 4 1

R 295 BT1 B A T CON 1 5 K /F

2 1 ,2 4 ,2 5 A D [ 0 ..3 1 ] +3 V S US 2 1 ,2 4 ,2 5 ,3 1 P ME # 17 P C L K _ ICH 2 1 ,2 4 ,2 5 P C IRS T # 2 2 4 ,2 5 ,3 1 ,3 2 C L K R U N # R 240 *3 3 _ 4 2 1
C

A D0 A D1 A D2 A D3 A D4 A D5 A D6 A D7 A D8 A D9 A D1 0 A D1 1 A D1 2 A D1 3 A D1 4 A D1 5 A D1 6 A D1 7 A D1 8 A D1 9 A D2 0 A D2 1 A D2 2 A D2 3 A D2 4 A D2 5 A D2 6 A D2 7 A D2 8 A D2 9 A D3 0 A D3 1

E2 E5 C2 F5 F3 E9 F2 D6 E6 D3 A2 D2 D5 H3 B4 J5 K2 K5 D4 L6 G3 H4 H2 H5 B3 M6 B2 K6 K3 A5 L1 K4 P6 G6 R2 R5 AF19

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 PME# PCICLK PCIRST# PLTRST# CLKRUN#/GPIO32

C/BE0# C/BE1# C/BE2# C/BE3# FRAME# IRDY# TRDY# DEVSEL# STOP# PAR SERR# PERR# PLOCK# REQ0# REQ1# REQ2# REQ3# REQ4#/GPI40 REQ5#/GPI1 REQ6#/GPI0 GNT0# GNT1# GNT2# GNT3# GNT4#/GPO48 GNT5#/GPO17 GNT6#/GPO16 PIRQA# PIRQB# PIRQC# PIRQD# PIRQE#/GPI2 PIRQF#/GPI3 PIRQG#/GPI4 PIRQH#/GPI5

J6 H6 G4 G2 J3 A3 J2 C3 J1 E1 G5 E3 C5 L5 B5 M5 B8 F7 E8 B7 C1 B6 F1 C8 E7 F6 D8 N2 L2 M1 L3 D9 C7 C6 M3

C /B E 0 # C /B E 1 # C /B E 2 # C /B E 3 # F RA ME # IR DY # TRDY # DE V S E L # S T OP# P AR S E R R# P E R R# P L OCK # R E Q0 # R E Q1 # R E Q2 # R E Q3 # R E Q4 # R E Q5 # R E Q6 # G NT 0 # G NT 1 # G NT 2 # T70 T76 T61 T65 P I RQA # P I RQB # P I R Q C# P I R Q D# I C H _ G P IO2

C /B E 0 # C /B E 1 # C /B E 2 # C /B E 3 #

2 1 ,2 4 ,2 5 2 1 ,2 4 ,2 5 2 1 ,2 4 ,2 5 2 1 ,2 4 ,2 5

R P12 R E Q5 # S E R R# R E Q4 # R E Q0 # + 3 V R UN 6 7 8 9 10

PCI

F RA ME # 2 1 ,2 4 ,2 5 I R D Y # 2 1 ,2 4 ,2 5 T R D Y # 2 1 ,2 4 ,2 5 DE V S E L # 2 1 ,2 4 ,2 5 S T OP# 2 1 ,2 4 ,2 5 P A R 2 1 ,2 4 ,2 5 S E RR# 2 1 ,2 4 ,2 5 P E RR# 2 1 ,2 4 ,2 5 P L OCK # 21 R E Q0 # 25 R E Q1 # 21 R E Q2 # 24

+ 3 V R UN R 273 R 280 * 1 0 0 K _ 4 _ NC * 1 0 0 K _ 4 _ NC R 237 * 1 0 0 K _ 4 _ NC
B

REQ2 : MINI PCI
GNT0 : LAN GNT1 : 1394/CARDBUS

GNT2 : MINI PCI
M B _ ID0 M B _ ID1 M B _ ID2 R 272 1 K -0 402 R 279 1 K -0 402

G NT 0 # 25 G NT 1 # 21 G NT 2 # 24

R 236 1 K -0 402

R 2 28

1

2 1 0 K -0 402 P C IRS T # P L T RS T#_1 1 1 0 K -0 402 P DD0 P DD1 P DD2 P DD3 P DD4 P DD5 P DD6 P DD7 P DD8 P DD9 P D D 10 P D D 11 P D D 12 P D D 13 P D D 14 P D D 15 P D CS 1 # P D CS 3 # P DA 0 P DA 1 P DA 2 P D I O R# P DIO W# P IO RDY IR Q 14 P DDRE Q P D D A CK # AD14 AF15 AF14 AD12 AE14 AC11 AD11 AB11 AE13 AF13 AB12 AB13 AC13 AE15 AG15 AD13 AD16 AE17 AC16 AB17 AC17 AE16 AC14 AF16 AB16 AB14 AB15 DD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7 DD8 DD9 DD10 DD11 DD12 DD13 DD14 DD15 DCS1# DCS3# DA0 DA1 DA2 DIOR# DIOW# IORDY IDEIRQ DDREQ DDACK# I C H 6 -M

P I RQA # P I RQB # P I R Q C# P I R Q D#

2 1 ,2 5 24 21 2 1 ,2 4

Board ID
+ 3 V R UN

HDD LED
Q 30 * D T A 1 1 4 Y UA
C

+ 3 V R UN

R 204

2

2 D18 SATALED# SATA0_RXN SATA0_RXP SATA0_TXN SATA0_TXP SATA2_RXN SATA2_RXP SATA2_TXN SATA2_TXP SATA_CLKN SATA_CLKP SATARBIAS# SATARBIAS AC19 AE3 AD3 AG2 AF2 AD7 AC7 AF6 AG6 AC2 AC1 AG11 AF11 R 2 07 S A T A BIAS 1 S A T A _ L ED# S A T A _ RX N0 _C S A T A _ RX P0_C S A T A _ T XN0_C S A T A _TXP0_C

1 *B A S 3 16

M_ S E N# 1 9 ,3 1 ,3 2 2 10K S A T A _ RX N0 _C 20 S A T A _ RX P0_C 20

47K

+3 V S US C 282 *18P 5 2 U34 C 439 1 .0 4 7 U/1 0 V _ 4 2

1

SATA

3

1

IDE

H D D L E D # 2 0 ,2 4

8 ,1 3 ,2 0 ,3 1 ,3 2 P L T RST#

4 1 7 S H3 2 P L T RS T#_1

Try to remove 7SH32, if possible.

CL K _ P CIE _ S A TA# 17 CL K _ P CIE _ S A TA 17 2 4 .9 /F 2

20 P D D [ 0 ..1 5 ] 20 20 20 20 20 20 20 20 20 20 20 P D CS 1 # P D CS 3 # P DA 0 P DA 1 P DA 2 P D I O R# P DIO W# P IO RDY IR Q 14 P DDRE Q P D D A CK #

P D D [ 0 ..1 5 ]

C 4 3 7 *3 9 0 0P S A T A _ T XN0_C 1 2 C 4 3 8 *3 9 0 0P S A T A _TXP0_C 1 2

S A T A _ RXN0 20 S A T A _RXP0 20

Place within 500mils of ICH6 ball
C10 B9 A10 F11 F10 B10 C9 T60 T135 R 2 74 C 3 83 * 1 0 P _ 4 _ NC 39_4 1 2 R 2 76 R 2 75 R 2 77 39_4 39_4 39_4 A C_ B IT CL K 28 A C _ S Y N C 28 A C_ RE S E T # 28 A C _ S D IN0 28 A C _ S DOUT 28 C 380 * 1 0 P _ 4 _ NC

AC-97/ AZALIA

ACZ_BIT_CLK ACZ_SYNC ACZ_RST# ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN2 ACZ_SDO

Distance between the ICH-6 M and cap on the "P" signal should be identical distance between the ICH-6 M and cap on the "N" signal for same pair.

2

1

D

D

PROJECT : ED3

Quanta Computer Inc.
Size D a te:
1 2 3 4 5 6

D o c u m e n t Nu mb e r

ICH6-M (CPU, PCI, IDE, SATA, AC97)
W e d n e sd a y, Ju n e 1 5 , 2 0 0 5
7

Rev A3A of 38

Sheet

12
8

PDF created with pdfFactory trial version www.pdffactory.com

1

2

3

4

5

6

7

8

U 3 5B
A

C L K 4 8 _ US B R 269 *6 8 _ 4

24 U S B P 0 + 24 U S B P 0 24 U S B OC0 # 31 U S B P 2 + 31 U S B P 2 31 U S B OC2 # 24 U S B P 4 + 24 U S B P 4 24 U S B OC4 #

O C 0# O C 2# O C 4# O C 6#

D21 C21 C27 C19 D19 B26 D17 E17 C23 D15 C15 C25 A27 T25 T24 R27 R26 V25 V24 U27 U26 AD25 AC25

USBP0P USBP0N OC0# USBP2P USBP2N OC2# USBP4P USBP4N OC4#/GPI9 USBP6P USBP6N OC6#/GPI14 CLK48 DMI0_RXN DMI0_RXP DMI0_TXN DMI0_TXP DMI1_RXN DMI1_RXP DMI1_TXN DMI1_TXP DMI_CLKN DMI_CLKP HSIN0 HSIP0 HSON0 HSOP0 HSIN1 HSIP1 HSON1 HSOP1 SMBCLK SMBDATA SMBALERT#/GPI11

USB

17 C L K 4 8 _ US B 8 8 8 8 8 8 8 8 17 C L K _ P CIE _ ICH# 17 C L K _ P CIE _ ICH
B

C L K 4 8 _ US B

USBP1P USBP1N OC1# USBP3P USBP3N OC3# USBP5P USBP5N OC5#/GPI10 USBP7P USBP7N OC7#/GPI15 USBRBIAS USBRBIAS# DMI2_RXN DMI2_RXP DMI2_TXN DMI2_TXP DMI3_RXN DMI3_RXP DMI3_TXN DMI3_TXP DMI_ZCOMP DMI_IRCOMP

B20 A20 B27 B18 A18 C26 A16 B16 D23 B14 A14 C24 B22 A22 Y25 Y24 W27 W26 AB24 AB23 AA27 AA26 F24 F23 M25 M24 L27 L26 P24 P23 N27 N26 W4 U6 Y5 T4 T5 T6 V5 U2 U5 AG21 AC21 AD22 AB20 P5 AF17 R3 T3 AE18 AF18 AG18 AF20 AC18 E12 E11 C13 C12 C11 E13 F12 B11 AD9 AF8 AG8 U3

O C 1# O C 3# O C 5# O C 7#

US B P 1 + 24 U S B P 1 - 24 U S B OC1 # 24 B T _ US B P3+ 24 B T _ US B P3- 24

A

U S B RB IA S

Place within 500mils of ICH-6 R 260 2 2 .6 /F 2 1 R P14 O C 6# O C 7# O C 4# O C 5# +3 V S US 6 7 8 9 10 10KX8 2 4 .9 /F 1 + 1 _ 5 V RUN
B

C 362 *2 .2 P _ 4

D M I_ RX N0 DMI_ RX P 0 DMI_ T X N0 DMI_ TXP0 D M I_ RX N1 DMI_ RX P 1 DMI_ T X N1 DMI_ TXP1

DMI

D M I_ RX N2 8 DMI_ RX P 2 8 DMI_ T X N2 8 DMI_ TXP2 8 D M I_ RX N3 8 DMI_ RX P 3 8 DMI_ T X N3 8 DMI_ TXP3 8 D M I _ COMP *P AD *P AD *P AD *P AD *P AD *P AD *P AD *P AD T122 T56 T123 T124 T55 T53 T118 T120 R 2 45 2

5 4 3 2 1

+3 V S US O C 0# O C 3# O C 1# O C 2#

T62 T64 T128 T129 T58 T57 T125 T127 17 P CL K _ S MB 17 P DA T _ SMB 18 L I D I C H #

*P A D *P A D *P A D *P A D *P A D *P A D *P A D *P A D

H25 H24 G27 G26 K25 K24 J27 J26 Y4 W5 W6 T2 AC20 AA1 AE20 V2 U1 Y3 AF21 AD19 W3 V6 E10 F8 AE19 R1 M2 R6 AB21 AD20 AD21 V3

PCI-EXPRESS

HSIN2 HSIP2 HSON2 HSOP2 HSIN3 HSIP3 HSON3 HSOP3

Place within 500mils of ICH-6
I C H _ P CIE _ W A K E # S ML INK 0 S ML INK 1 M C H _ S Y NC# S US B # 32 S U S C# 32 T54 R 226 1 R 222 1 R 223 1 R 2 02 1 680 2 1 0 K -0 402 2 1 0 K -0 402 2 1 0 K -0 402 2 +3 V S US

L IDICH# ICH_ RI# T H RM# I C H _ P W ROK D P R SLPVR B A T L OW # D N B S W O N# R S MRS T # I M V P _ P W RGD P M_ B MB US Y # L P CP D# 1 0 K -0 402 R 2 18 P CS P K P R _ INS E RT #1 K B S MI# S W I# S C I#

SM&SMI

SMLINK0 SMLINK1 LINKALERET# SLP_S3# SLP_S4# SLP_S5# LAN_RST# SYS_RESET# WAKE# MCH_SYNC# STP_PCI#/GPO18 STP_CPU#/GPO20 SERIRQ GPIO25 SATA0GP/GPIO26 GPIO27 GPIO28 SATA1GP/GPIO29 SATA2GP/GPIO30 SATA3GP/GPIO31 GPIO33 GPIO34 LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2 LAN_CLK LAN_RSTSYNC

S ML INK 0 S ML INK 1 S MB _ L INK _ A L E RT#

+ 3 V R UN

5 T HRM# 32 I C H _ P W R OK 33 D P R S L P V R 32 D N B S W O N# 32 R S MRS T # 8 ,3 3 I M V P _ P W RGD 8 P M_ B MB US Y # 2 1 ,3 1 L P CP D#

+3 V S US 17 1 4 M _ ICH

T49 * P A D

RI# THRM# PWROK DPRSLPVR/TP1 BATLOW#/TP0 PWRBTN# RSMRST# VRMPWRGD BM_BUSY#/GPIO6 SUS_STAT#/LPCPD# SUSCLK CLK14 SPKR GPI7 GPI8 GPI12 GPI13 GPO19 GPO21 GPO23 GPIO24

PM

R_ S Y S _ RE S E T # I C H _ P CIE _ W A K E # M C H _ S Y NC#

R 229 1

2

0_4

P L T RST# 8 ,1 2 ,2 0 ,3 1 ,3 2 S Y S _ RE S E T# 5

SYS_RESET# should be high faster than ICH_PWROK.

S T P _ P CI# 17 S T P _ CP U# 6 ,1 7 ,3 3 S E R I RQ 1 2 ,2 1 ,2 4 ,3 1 ,3 2 * P A D T121 L C D I D 1 18 L C D I D 0 18

C

R 257 33_4 2 1

28 P CS P K 3 1 ,3 2 P R _ INS E RT # 3 1 ,3 2 K B S MI# 32 S W I# 32 S C I# 20 I C H _ GP O1 9 20 R S T _ HDD#

2

2 D2 S W1010C

P R _ D OCK #

MISC&GPIO

C

1

C 336 1 0 P _4

T80 * P A D T50 * P A D

* P A D T46 * P A D T48 *P AD *P AD *P AD *P AD *P AD *P AD T67 T59 T138 T137 T136 T133

1 R 206 33_4 2 * P A D T66 * P A D T134

T71 * P A D T132 * P A D T72 * P A D T63 * P A D

D12 B12 D11 F13

EE_CS EE_SHCLK EE_DOUT EE_DIN

LAN

+3 V S US

R 2 99 R 209 1 R 2 25 R 203 1

1 0 K -0402 8 .2 K

S W I# P R _ D OCK # K B S MI# T H RM# R P 10 7 5 3 1 8 P 4 R-1 0 K 8 6 4 2

AC5 AD5 AF4 AG4 AC9

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 I C H 6 -M

RESERVED

RSVD6 RSVD7 RSVD8 RSVD9

+ 3 V R UN +3 V S US
D

2

1 0 K -0402 2 8 .2 K

+ 3 V S US

+3 V S US RP9 S C I# L IDICH# P DA T _ SMB S MB _ L INK _ A L E RT# 7 5 3 1 8 P 4 R-1 0K Size D a te: 8 6 4 2 B A T L OW # ICH_ RI# P CL K _ S MB R_ S Y S _ RE S E T #

D

+ 3 V R UN

R 2 1 0 1 0 K -0 402 1 2 I C H _ P W ROK 1 2 R S MRS T # R 2 1 9 1 0 K -0 402

PROJECT : ED3

Quanta Computer Inc.
D o c u m e n t Nu mb e r

ICH6-M (USB, DMI, LPC)
W e d n e sd a y, Ju n e 1 5 , 2 0 0 5
7

Rev A3A Sheet 13
8

of

38

1

2

3

4

5

6

PDF created with pdfFactory trial version www.pdffactory.com

1

2

3

4

5

6

7

8

L36 + 1 _ 5 V RUN 1

1

B L M4 1 P 6 00SPG +1 _ 5 V _ P CIE 2 2 C 279 2 2 0 U_ 4 V _L 2 + C 244 . 1 U/1 0 V _ 4

C 320 . 1 U/1 0 V _ 4 2 2 AA22 AA23 AA24 AA25 AB25 AB26 AB27 F25 F26 F27 G22 G23 G24 G25 H21 H22 J21 J22 K21 K22 L21 L22 M21 M22 N21 N22 N23 N24 N25 P21 P25 P26 P27 R21 R22 T21 T22 U21 U22 V21 V22 W21 W22 Y21 Y22 AA6 AB4 AB5 AB6 AC4 AD4 AE4 AE5 AF5 AG5 AA7 AA8 AA9 AB8 AC8 AD8 AE8 AE9 AF9 AG9 AC27 E26 AE1 AG10

U 35C + 1 _ 5 V RUN 2 2 2 2 VCC1_5_1 VCC1_5_2 VCC1_5_3 VCC1_5_4 VCC1_5_5 VCC1_5_6 VCC1_5_7 VCC1_5_8 VCC1_5_9 VCC1_5_10 VCC1_5_11 VCC1_5_12 VCC1_5_13 VCC1_5_14 VCC1_5_15 VCC1_5_16 VCC1_5_17 VCC1_5_18 VCC1_5_19 VCC1_5_20 VCC1_5_21 VCC1_5_22 VCC1_5_23 VCC1_5_24 VCC1_5_25 VCC1_5_26 VCC1_5_27 VCC1_5_28 VCC1_5_29 VCC1_5_30 VCC1_5_31 VCC1_5_32 VCC1_5_33 VCC1_5_34 VCC1_5_35 VCC1_5_36 VCC1_5_37 VCC1_5_38 VCC1_5_39 VCC1_5_40 VCC1_5_41 VCC1_5_42 VCC1_5_43 VCC1_5_44 VCC1_5_45 VCC1_5_46 VCC1_5_47 VCC1_5_48 VCC1_5_49 VCC1_5_50 VCC1_5_51 VCC1_5_52 VCC1_5_53 VCC1_5_54 VCC1_5_55 VCC1_5_56 VCC1_5_57 VCC1_5_58 VCC1_5_59 VCC1_5_60 VCC1_5_61 VCC1_5_62 VCC1_5_63 VCC1_5_64 VCC1_5_65 VCCDMIPLL VCC3_3_1 VCCSATAPLL VCC3_3_22 VCC1_5_79 VCC1_5_80 VCC1_5_81 VCC1_5_82 VCC1_5_83 VCC1_5_84 VCC1_5_85 VCC1_5_86 VCC1_5_87 VCC1_5_88 VCC1_5_89 VCC1_5_90 VCC1_5_91 VCC1_5_92 VCC1_5_93 VCC1_5_94 VCC1_5_95 VCC1_5_96 VCC1_5_97 VCC1_5_98 VCC3_3_2 VCC3_3_3 VCC3_3_4 VCC3_3_5 VCC3_3_6 VCC3_3_7 VCC3_3_8 VCC3_3_9 VCC3_3_10 VCC3_3_11 VCC3_3_12 VCC3_3_13 VCC3_3_14 VCC3_3_15 VCC3_3_16 VCC3_3_17 VCC3_3_18 VCC3_3_19 VCC3_3_20 VCC3_3_21 VCCSUS1_5_1 VCCSUS1_5_2 VCCSUS1_5_3 VCC1_5_67 VCC1_5_68 VCC1_5_69 VCC1_5_70 VCC1_5_71 VCC1_5_72 VCC1_5_73 VCC1_5_74 VCC1_5_75 VCC1_5_76 VCC1_5_77 VCC1_5_78 VCC2_5_2 VCC2_5_4 V5REF1 V5REF2 V5REF_SUS VCCUSBPLL VCCSUS3_3_20 VCCLAN3_3/VCCSUS3_3_1 VCCLAN3_3/VCCSUS3_3_2 VCCRTC VCCLAN3_3/VCCSUS3_3_3 VCCLAN3_3/VCCSUS3_3_4 VCCLAN1_5/VCCSUS1_5_1 VCCSUS3_3_1 VCCLAN1_5/VCCSUS1_5_2 VCCSUS3_3_2 VCCSUS3_3_3 V_CPU_IO1 VCCSUS3_3_4 V_CPU_IO2 VCCSUS3_3_5 V_CPU_IO3 VCCSUS3_3_6 VCCSUS3_3_13 VCCSUS3_3_7 VCCSUS3_3_14 VCCSUS3_3_8 VCCSUS3_3_15 VCCSUS3_3_9 VCCSUS3_3_16 VCCSUS3_3_10 VCCSUS3_3_17 VCCSUS3_3_11 VCCSUS3_3_18 VCCSUS3_3_12 VCCSUS3_3_19 I C H 6 -M AA19 AA20 AA21 L11 L12 L14 L16 L17 M11 M17 P11 P17 T11 T17 U11 U12 U14 U16 U17 F9 A6 B1 E4 H1 H7 J7 L4 L7 M7 P1 AA12 AA14 AA15 AA17 AC15 AD17 AG13 AG16 AG19 AA10 G19 R7 U7 G8 D24 D25 D26 D27 E20 E21 E22 E23 E24 F20 G20 P7 AB18 A8 AA18 F21 A25 A24 2 AB3 G10 G11 AB22 AD26 AG23 2 C16 D16 E16 F15 F16 G15 G16 C 235 V CCRTC 1 C 318 1 . 0 1 U/1 6 V _ 4 + 1 _ 5 V RUN +1 _ 5 V S US 2 C 275 2 C 269 C 322 C 321 C 277 C 317 2 C 257 A1 A12 A15 A19 A21 A23 A26 A4 A7 A9 AA11 AA13 AA16 AA4 AB1 AB10 AB19 AB2 AB7 AB9 AC10 AC12 AC22 AC23 AC24 AC26 AC3 AC6 AD1 AD10 AD15 AD18 AD2 AD24 AD6 AE10 AE11 AE12 AE2 AE21 AE25 AE6 AE7 AF1 AF10 AF12 AF26 AF3 AF7 AG1 AG12 AG14 AG17 AG20 AG22 AG3 AG7 B13 B15 B19 B21 B23 B24 B25 C14 C18 C20 C22 C4 D1 D10 D13 D14 D18 D20 D22 D7 E14 E15 E18 E19 E25 F17 F19 F22 F4

U35D VSS001 VSS002 VSS003 VSS004 VSS005 VSS006 VSS007 VSS008 VSS009 VSS010 VSS011 VSS012 VSS013 VSS014 VSS015 VSS016 VSS017 VSS018 VSS019 VSS020 VSS021 VSS022 VSS023 VSS024 VSS025 VSS026 VSS027 VSS028 VSS029 VSS030 VSS031 VSS032 VSS033 VSS034 VSS035 VSS036 VSS037 VSS038 VSS039 VSS040 VSS041 VSS042 VSS043 VSS044 VSS045 VSS046 VSS047 VSS048 VSS049 VSS050 VSS051 VSS052 VSS053 VSS054 VSS055 VSS056 VSS057 VSS058 VSS059 VSS060 VSS061 VSS062 VSS063 VSS064 VSS065 VSS066 VSS067 VSS068 VSS069 VSS070 VSS071 VSS072 VSS073 VSS074 VSS075 VSS076 VSS077 VSS078 VSS079 VSS080 VSS081 VSS082 VSS083 VSS084 VSS085 VSS086 VSS087 VSS088 VSS089 VSS090 VSS091 VSS092 VSS093 VSS094 VSS095 VSS096 VSS097 VSS098 VSS099 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 G1 G12 G21 G7 G9 H23 H26 H27 J23 J24 J25 J4 K1 K23 K26 K27 K7 L13 L15 L23 L24 L25 M12 M13 M14 M15 M16 M23 M26 M27 M4 N1 N11 N12 N13 N14 N15 N16 N17 N7 P12 P13 P14 P15 P16 P22 R11 R12 R13 R14 R15 R16 R17 R23 R24 R25 R4 T1 T12 T13 T14 T15 T16 T23 T26 T27 T7 U13 U15 U23 U24 U25 V23 V26 V27 V4 W1 W23 W24 W25 W7 Y23 Y26 Y27 Y6 E27

1

1

1

1

1

1

1

+5 V S US
A

R 2 78 1 R 2 71 1 D 19

* 1 0 _ NC 2 1 0 0 /F 2

C 3 07 . 1 U/1 0 V _ 4

1

. 1 U/1 0 V _ 41 U/1 0 V _ 41 U/1 0 V _ 41 U/1 0 V _ 40 1 U/1 6 V _ 4 . . . .

A

+ 5 V R UN

VCC

+ 3 V R UN

2 R B751V

1 2

V 5 RE F C 344 . 1 U/1 0 V _ 4 1 C 357

1

2

1 U/1 0 V _ 6

+3_3V_PCI
+ 3 V R UN 2 2 C 247 C 314 2 C 274

+5 V A L W

R 2 41 1 R 2 42 1 D 17

* 1 0 _ NC 2 10_4 2 CT_0229: Adding 1u cap to meet CRB.1501

1

1

+5 V S US

+3_3V_ICH
+ 3 V R UN 2 C 281 2 C 341

+3 V S US

2 R B751V

1 2

V 5 RE F _ S US C 323 . 1 U/1 0 V _ 4 1 C 316

1

1

2

B

1 U/1 0 V _ 6

1

. 1 U/1 0 V _ 41 U/1 0 V _ 4 . +1 _ 5 V S US 2 C 272 . 1 U/1 0 V _ 4

1

. 1 U/1 0 V _ 41 U/1 0 V _ 41 U/1 0 V _ 4 . .

GND

B

+1_5V_SATA_RX
+ 1 _ 5 V RUN 2 C 280 . 1 U/1 0 V _ 4

1

1

1

+ 1 _ 5 V RUN + 1 _ 5 V RUN 2 V C C D M IP L L _ R

+1_5V_SATA_TX
2 R 2 12 2 1 2 C 2 42 C 2 48 . 1 U/1 0 V _ 4

1

. 1 U/1 0 V _ 41 U/1 0 V _ 4 .

+ 1 _ 5 V RUN 2 C 239 2 1 C 252

2

1

1 0 U_ 6 .3 V _ 8 1 . 0 1 U/1 6 V _ 4

1

C 241 1 R

L34 B L M1 1 A 121S

1

1

. 1 U/1 0 V _ 41 U/1 0 V _ 4 .

+ 2 _ 5 V RUN 2 1 C 276

C

+ 3 V R UN + 1 _ 5 V RUN V C C D MIP L L 2 C 237 2 . 1 U/1 0 V _ 4 C 2 3 8 1 + 3 V R UN C 319 2

. 1 U/1 0 V _ 4

V 5 RE F V 5 RE F _ S US

C

+ 1 _ 5 V RUN +3 V S US 2 C 340

1

. 1 U/1 0 V _ 4 1 . 1 U/1 0 V _ 4

A13 F14 G13 G14 A11 U4 V1 V7 W2 Y7 A17 B17 C17 F18 G17 G18

. 1 U/1 0 V _ 4

+ 1 _ 5 V RUN

+ 3 V R UN 2 C 234 2 C 2 40

1

1

. 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4

+ V C CP

+3 V S US 2 C 3 37

1

. 1 U/1 0 V _ 4 V CCRTC I C H 6 -M

1

. 1 U/1 0 V _ 4

2
D

C 243

+3 V S US 2 C 2 54 2 C 3 43

1

. 1 U/1 0 V _ 4
D

1

1

. 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4

CT_0505: Change footprint to mbga609-intel-ich6 from MBGA609-ICH6

PROJECT : ED3

Quanta Computer Inc.
Size D a te:
1 2 3 4 5 6

D o c u m e n t Nu mb e r

ICH6-M (Power & GND)
T u e sd a y, Ju n e 1 4 , 2 0 0 5
7

Rev A3A Sheet 14
8

of

38

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A

B

C

D

E

1 . 8 V S US 1 . 8 V S US

15
M _ B _ D Q [ 0 ..6 3 ] 9

9 ,1 6 M _ B _ A [0 ..1 3 ]

81 82 87 88 95 96 103 104 111 112 117 118

9 ,1 6 M _ A _ A [0 ..1 3 ] M_ A _ A 0 M_ A _ A 1 M_ A _ A 2 M_ A _ A 3 M_ A _ A 4 M_ A _ A 5 M_ A _ A 6 M_ A _ A 7 M_ A _ A 8 M_ A _ A 9 M_ A _ A 1 0 M_ A _ A 1 1 M_ A _ A 1 2 M_ A _ A 1 3

M _ A _ D Q [ 0 ..6 3 ] 9

4

102 101 100 99 98 97 94 92 93 91 105 90 89 116 86 84 107 106 85

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 BA0 BA1 BA2 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 CK0 CK0 CK1 CK1 CKE0 CKE1 RAS CAS WE S0 S1 ODT0 ODT1 SA0 SA1 SDA SCL

CN24
REVERSE

9 , 1 6 M_ A _ B S # 0 9 , 1 6 M_ A _ B S # 1 9 , 1 6 M_ A _ B S # 2 M _ A _ DM0 M _ A _ DM1 M _ A _ DM2 M _ A _ DM3 M _ A _ DM4 M _ A _ DM5 M _ A _ DM6 M _ A _ DM7 M _ A _ DQS 0 M _ A _ DQS 1 M _ A _ DQS 2 M _ A _ DQS 3 M _ A _ DQS 4 M _ A _ DQS 5 M _ A _ DQS 6 M _ A _ DQS 7

9 M _ A _ D M [0 ..7 ]

10 26 52 67 130 147 170 185 13 31 51 70 131 148 169 188

3

9 M _ A _ D Q S [0 ..7 ]

9 M _ A _ D Q S # [0 ..7 ]

M _ A _ DQS # 0 11 M _ A _ DQS # 1 29 M _ A _ DQS # 2 49 M _ A _ DQS # 3 68 M _ A _ DQS # 4 129 M _ A _ DQS # 5 146 M _ A _ DQS # 6 167 M _ A _ DQS # 7 186 M _ C L K OUT 0 M _ C L K OUT 0 # M _ C L K OUT 1 M _ C L K OUT 1 #

8 M _ C L K OUT 0 8 M _ C L K OUT 0 # 8 M _ C L K OUT 1 8 M _ C L K OUT 1 # M _ C L K OUT 0 C612 *1 0P M _ C L K OUT 0 #
2

30 32 164 166 79 80 108 113 109 110 115 114 119 198 200

8 , 1 6 M _ CK E 0 8 , 1 6 M _ CK E 1 9 , 1 6 M _ A _ RA S # 9 , 1 6 M _ A _ CA S # 9 ,16 M _ A_WE# 8 , 1 6 M _ CS # 0 8 , 1 6 M _ CS # 1 8 , 1 6 M _ ODT 0 8 , 1 6 M _ ODT 1

SO-DIMM

SO-DIMM

M _ C L K OUT 1

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

5 7 17 19 4 6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 50 69 83 120 163

M _ A _ DQ1 M _ A _ DQ0 M _ A _ DQ2 M _ A _ DQ7 M _ A _ DQ5 M _ A _ DQ4 M _ A _ DQ3 M _ A _ DQ6 M _ A _ DQ1 3 M _ A _ DQ9 M _ A _ DQ1 0 M _ A _ DQ1 1 M _ A _ DQ1 2 M _ A _ DQ8 M _ A _ DQ1 4 M _ A _ DQ1 5 M _ A _ DQ1 7 M _ A _ DQ2 1 M _ A _ DQ2 2 M _ A _ DQ1 9 M _ A _ DQ2 0 M _ A _ DQ1 6 M _ A _ DQ1 8 M _ A _ DQ2 3 M _ A _ DQ2 9 M _ A _ DQ2 8 M _ A _ DQ3 1 M _ A _ DQ2 7 M _ A _ DQ2 4 M _ A _ DQ2 5 M _ A _ DQ2 6 M _ A _ DQ3 0 M _ A _ DQ3 2 M _ A _ DQ3 3 M _ A _ DQ3 4 M _ A _ DQ3 5 M _ A _ DQ3 6 M _ A _ DQ3 7 M _ A _ DQ3 8 M _ A _ DQ3 9 M _ A _ DQ4 0 M _ A _ DQ4 1 M _ A _ DQ4 2 M _ A _ DQ4 3 M _ A _ DQ4 4 M _ A _ DQ4 5 M _ A _ DQ4 6 M _ A _ DQ4 7 M _ A _ DQ4 8 M _ A _ DQ4 9 M _ A _ DQ5 5 M _ A _ DQ5 0 M _ A _ DQ5 2 M _ A _ DQ5 3 M _ A _ DQ5 4 M _ A _ DQ5 1 M _ A _ DQ6 0 M _ A _ DQ5 7 M _ A _ DQ5 8 M _ A _ DQ5 9 M _ A _ DQ5 6 M _ A _ DQ6 1 M _ A _ DQ6 2 M _ A _ DQ6 3

M_ B _ A 0 M_ B _ A 1 M_ B _ A 2 M_ B _ A 3 M_ B _ A 4 M_ B _ A 5 M_ B _ A 6 M_ B _ A 7 M_ B _ A 8 M_ B _ A 9 M_ B _ A 1 0 M_ B _ A 1 1 M_ B _ A 1 2 M_ B _ A 1 3

81 82 87 88 95 96 103 104 111 112 117 118

102 101 100 99 98 97 94 92 93 91 105 90 89 116 86 84 107 106 85

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 BA0 BA1 BA2 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 CK0 CK0 CK1 CK1 CKE0 CKE1 RAS CAS WE S0 S1 ODT0 ODT1 SA0 SA1 SDA SCL VDDspd VREF VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20

CN23 REVERSE

9 ,1 6 M_ B _ B S # 0 9 ,1 6 M_ B _ B S # 1 9 ,1 6 M_ B _ B S # 2 M _ B _ DM0 M _ B _ DM1 M _ B _ DM2 M _ B _ DM3 M _ B _ DM4 M _ B _ DM5 M _ B _ DM6 M _ B _ DM7 M _ B _ DQS 0 M _ B _ DQS 1 M _ B _ DQS 2 M _ B _ DQS 3 M _ B _ DQS 4 M _ B _ DQS 5 M _ B _ DQS 6 M _ B _ DQS 7

9 M _ B _ D M[0 ..7 ]

10 26 52 67 130 147 170 185 13 31 51 70 131 148 169 188

9 M _ B _ D Q S [0 ..7 ]

9 M _ B _ D Q S # [0 ..7 ]

M _ B _ DQS # 0 11 M _ B _ DQS # 1 29 M _ B _ DQS # 2 49 M _ B _ DQS # 3 68 M _ B _ DQS # 4 129 M _ B _ DQS # 5 146 M _ B _ DQS # 6 167 M _ B _ DQS # 7 186 M _ C L K OUT 3 M _ C L K OUT 3 # M _ C L K OUT 4 M _ C L K OUT 4 #

8 M _ C L K OUT 3 8 M _ C L K OUT 3 # 8 M _ C L K OUT 4 8 M _ C L K OUT 4 # M _ C L K OUT 3

30 32 164 166 79 80 108 113 109 110 115 114 119

8 , 1 6 M _ CK E 2 8 , 1 6 M _ CK E 3 9 ,1 6 M _ B _ RA S # 9 ,1 6 M _ B _ CA S # 9 ,1 6 M _ B _ W E # 8 , 1 6 M _ CS # 2 8 , 1 6 M _ CS # 3 8 , 1 6 M _ ODT 2 8 , 1 6 M _ ODT 3 R 6 48 R 6 49 0 _4 1 0K_4 C G D A T _ S MB C G C L K _ S MB + 3V RUN C620 0 .1 U _4 M V R E F _ DIM

C610 *1 0P M _ C L K OUT 3 # M _ C L K OUT 4 C615 *1 0P M _ C L K OUT 4 # + 3V RUN

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

5 7 17 19 4 6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 50 69 83 120 163

M _ B _ DQ0 M _ B _ DQ1 M _ B _ DQ2 M _ B _ DQ3 M _ B _ DQ4 M _ B _ DQ5 M _ B _ DQ6 M _ B _ DQ7 M _ B _ DQ8 M _ B _ DQ9 M _ B _ DQ1 0 M _ B _ DQ1 1 M _ B _ DQ1 2 M _ B _ DQ1 3 M _ B _ DQ1 5 M _ B _ DQ1 4 M _ B _ DQ1 6 M _ B _ DQ2 1 M _ B _ DQ2 2 M _ B _ DQ2 3 M _ B _ DQ2 0 M _ B _ DQ1 7 M _ B _ DQ1 9 M _ B _ DQ1 8 M _ B _ DQ2 8 M _ B _ DQ2 5 M _ B _ DQ3 1 M _ B _ DQ2 7 M _ B _ DQ2 4 M _ B _ DQ3 0 M _ B _ DQ2 9 M _ B _ DQ2 6 M _ B _ DQ3 2 M _ B _ DQ3 3 M _ B _ DQ3 4 M _ B _ DQ3 5 M _ B _ DQ3 6 M _ B _ DQ3 7 M _ B _ DQ3 8 M _ B _ DQ3 9 M _ B _ DQ4 0 M _ B _ DQ4 1 M _ B _ DQ4 2 M _ B _ DQ4 3 M _ B _ DQ4 4 M _ B _ DQ4 5 M _ B _ DQ4 6 M _ B _ DQ4 7 M _ B _ DQ5 3 M _ B _ DQ4 9 M _ B _ DQ5 0 M _ B _ DQ5 1 M _ B _ DQ4 8 M _ B _ DQ5 2 M _ B _ DQ5 4 M _ B _ DQ5 5 M _ B _ DQ5 6 M _ B _ DQ6 3 M _ B _ DQ5 7 M _ B _ DQ5 9 M _ B _ DQ6 0 M _ B _ DQ6 1 M _ B _ DQ5 8 M _ B _ DQ6 2

VDD0 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11

VDD0 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11

4

1 . 8 V S US
3

C 6 00 C 6 01 C 6 02 C 6 03

* 1 0 U / 6 .3 V /X 5 R * 1 0 U / 6 .3 V /X 5 R 1 0 U / 6 .3 V /X 5 R 1 0 U / 6 .3 V /X 5 R

C 6 04 C 6 05 C 6 06 C 6 07 C 6 08 C 6 09 C 6 11 C 6 13 C 6 14 C 6 16 C 6 18 C 6 19 C 6 21 C 6 23

0 . 1 U_ 4 0 . 1 U_ 4 0 . 1 U_ 4 0 . 1 U_ 4 0 . 1 U_ 4 0 . 1 U_ 4 0 . 1 U_ 4 0 . 1 U_ 4 0 . 1 U_ 4
2

C617 *1 0P M _ C L K OUT 1 # 17 C G D A T _ S MB 17 C G C L K _ S MB + 3V RUN 1 . 8 V S US C 6 26 0 .1 U _4

C G D A T _ S MB C G C L K _ S MB C622 M V R E F _ DIM 0 . 1 U_ 4

195 197 199 1

NC1 NC2 NC3 NC4 NC/TEST

198 200 195 197 199 1 2 3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54

NC1 NC2 NC3 NC4 NC/TEST

0 . 1 U_ 4 0 . 1 U_ 4 0 . 1 U_ 4 0 . 1 U_ 4 0 . 1 U_ 4 0 . 1 U_ 4 0 . 1 U_ 4 0 . 1 U_ 4 0 . 1 U_ 4 0 . 1 U_ 4 0 . 1 U_ 4

VDDspd VREF VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20

1 . 8 V S US

C 6 24

0 . 1 U_ 4

1

C630 2 . 2 U / 1 0 V /X 5 R

C631 0 . 1 U_ 4

1

VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33

59 60 65 66 71 72 77 78 121 122 127 128 132

59 60 65 66 71 72 77 78 121 122 127 128 132

2 3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54

(H=5.2)

VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34

196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133

1

C 6 27 2 . 2 U / 1 0 V /X 5 R

C628 0 .1 U _4

(H=9.2)

1 . 8 V S US

R650 1 K /F_4 M V R E F _ DIM R651 C 6 36 1 U / 6 . 3 V /X 5 R 1 K /F_4

VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34

VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33

196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133

2

C 6 25 C 6 29 C 6 32 C 6 33 C 6 34 C 6 35

2

1

PROJECT : ED3

Quanta Computer Inc.
S ize D o c u m e n t N u mb e r

DDRII_ S O DIM M _ R

DDRII_ S O DIM M _ R

1.This part should not contain any substances which are specified in SS-00259-1 2.Purchase ink, paint, wire rods and molding resins only from the business partners that Sony approves as Green Partners. D a t e :
A B C D

DDRII SO-DIMM 200P
W e d n e s d a y , Ju n e 1 5 , 2 0 0 5 S heet
E

R ev A3A 15 of 38

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7

8

VTT_MEM 8,15 8,15 8,15 8,15 8,15 8,15 8,15 8,15 M_CKE0 M_CKE1 M_CKE2 M_CKE3 M_ODT0 M_ODT1 M_ODT2 M_ODT3 M_A_BS#0 M_A_BS#1 M_A_BS#2 M_A_WE# M_A_CAS# M_A_RAS# M_B_BS#0 M_B_BS#1 M_B_BS#2 M_B_WE# M_B_CAS# M_B_RAS# R617 R618 R619 R620 R621 R622 R623 R624 R625 R626 R627 R628 R629 R630 R631 R632 R633 R634 R635 R636 R637 R638 R639 R640 56_4 56_4 56_4 56_4 56_4 56_4 56_4 56_4 56_4 56_4 56_4 56_4 56_4 56_4 56_4 56_4 56_4 56_4 56_4 56_4 56_4 56_4 56_4 56_4

1.8VSUS
A

A

1

C586 10U/6.3V/X5R U45 +5VSUS C590 2.2U/10V/X5R

2

1 2
VTT_MEM R645 0_4

VDDSSNS VLDOIN VTT PGND VTTSNS
TPS51100 0_4

VIN S5 GND S3 GND VTTREF

10 9 8 7 6 1

1

2
S USON 32,34,35,36

9,15 M_A_BS#0 9,15 M_A_BS#1 9,15 M_A_BS#2 9,15 M_A_WE# 9,15 M_A_CAS# 9,15 M_A_RAS# 9,15 M_B_BS#0 9,15 M_B_BS#1 9,15 M_B_BS#2

3 4 2 1 1
C637 10U/6.3V/X5R C595 10U/6.3V/X5R

51100

M A INON 32,34,36

1
C596 *1000P_4 R646

5 1

11

2

2

2

1
51100

2

C597 0.1U_4

9,15 M_B_WE# 9,15 M_B_CAS# 9,15 M_B_RAS# 8,15 8,15 8,15 8,15 M_CS#0 M_CS#1 M_CS#2 M_CS#3

2

51100

B

B

VTT_MEM C565 C566 C567 C568 C569 C570 C571 C572 C573 C574 C575 C576 C577 C578 C579 C580 C581 C582 C583 C584 C585 C587 C588 C589 C591 C592 C593 C594 *10U/6.3V/X5R *10U/6.3V/X5R 0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4 *0.1U_4 *0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4 *0.1U_4 0.1U_4 0.1U_4 0.1U_4 *0.1U_4 0.1U_4 0.1U_4 0.1U_4 *0.1U_4 0.1U_4 9,15 M_A_A[0..13] M_A_A13 M_A_A10 M_A_A0 M_A_A2 M_A_A4 M_A_A6 M_A_A7 M_A_A11 M_A_A9 M_A_A12 M_A_A3 M_A_A1 M_A_A8 M_A_A5 RP19 RP20 RP21 RP22 RP23 R641 R642 RP18 56_4 56_4 0404-56X2 0404-56X2 0404-56X2 0404-56X2 0404-56X2 0404-56X2

1 3 1 3 1 3 1 3 1 3 1 3

2 4 2 4 2 4 2 4 2 4 2 4

9,15 M_B_A[0..13]

M_B_A0 M_B_A2 M_B_A4 M_B_A6 M_B_A11 M_B_A7 M_B_A3 M_B_A1 M_B_A9 M_B_A5 M_B_A12 M_B_A8 M_B_A10 M_B_A13

RP24 RP25 RP26 RP27 RP28 RP29 R643 R644

C

1 3 1 3 1 3 1 3 1 3 1 3

2 4 2 4 2 4 2 4 2 4 2 4

0404-56X2 0404-56X2 0404-56X2 0404-56X2
C

0404-56X2 0404-56X2 56_4 56_4

D

D

PROJECT : ED2

Quanta Computer Inc.
Size D o cument Number

DDR TERMINATION
Date: W ednesday, June 15, 2005
7

Rev A3A Sheet 16
8

of

38

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1

2

3

4

5

6

1

2

3

4

5

6

7

8

FSC 1 0 0 0
A

FSB 0 0 1 1 0 0 1 1

FSA 1 1 1 0 0 0 0 1

CPU 100 133 166 200 266 333 400 RSVD

SRC 100 100 100 100 100 100 100 100

PCI 33 33 33 33 33 33 33 33
2 C 1 3 7 33P 2 1 C L K _ E N# C 1 3 1 33P 2 1 1 Y2 V D D A _ CR X IN

DothanA R137 R330 Install NC

DothanB NC NC

Place these termination to close CK410M. Cause those Pin-out is for Current-Mode.
R 157 1 R 160 1 R 151 1 R 154 1 37 38 2 4 9 .9 /F 2 4 9 .9 /F 2 4 9 .9 /F 2 4 9 .9 /F R 136 1 R 131 1 U22 50 49 10 55 54 XTAL_IN XTAL_OUT VTT_PWRGD#/PD# PCI_STOP# CPU_STOP# 52 44 43 41 40 36 35 33 32 31 30 26 27 24 25 22 23 19 20 17 18 5 4 3 56 9 8 R _ D R E F S S CL K R _ D R E F S S CL K # R _ P CL K _ L A N R _ P CL K _ P CM R _ P CL K _ S IO R _ P C L K _ MINI R _ P C L K _ ICH P CI F0 2 4 R 125 1 R 138 1 R 146 1 D R E F S S CL K 1 RP 5 D R E F S S CL K # 3 4 P 2 R-S -33 2 33_4 2 33_4 R 1 34 1 2 33_4 R 1 32 1 2 33_4 2 33_4 1 R 1 30 ICS 9 5 4 2 0 6 /CY 2 8 4XX 250mA ( MAX. ) R 1 23 1 2 33_4 P CL K _ L P C 31 2 1 0 K -0 402 D R E F S S CL K 8 D R E F S S CL K # 8 P CL K _ L A N 25 P CL K _ P CM 21 P CL K _ 5 5 1 32 P C L K _ MINI 24 P C L K _ ICH 12 + 3 V R UN R _ M CH_ 3 GP L L R _ MCH_ 3 GP L L # R_ P CIE _ S A T A R_ P CIE _ S A T A # R _ P C I E _ ICH R _ P C I E _ ICH# 4 2 2 4 2 4 C L K _ MCH_ 3 GP L L 3 RP 6 C L K _ MCH_ 3 GP L L # 1 4 P 2 R-S -33 CL K _ P CIE _ S A TA 1 RP 8 CL K _ P CIE _ S A T A# 3 4 P 2 R-S -33 C L K _ P C IE _ ICH 1 RP 7 C L K _ P CIE _ ICH# 3 4 P 2 R-S -33 C L K _ MCH_ 3 GP L L 8 C L K _ MCH_ 3 GP L L # 8 CL K _ P CIE _ S A TA 12 CL K _ P CIE _ S A T A# 12 C L K _ P C IE _ ICH 13 C L K _ P CIE _ ICH# 13
B

0 1 1 1

24 2 24 2 24 2 1 C 1 61 * 1 0 P _ NC 1

A

1 4 M_ A C9 7 28 1 4 M_ S UP E RIO 31 1 4 M _ ICH 13 C 171 * 1 0 P _ NC

<500mil

VDDA

VSSA

1 4 .3 1 8 MHZ XOUT

REF CPU0 CPU0# CPU1 CPU1#

1 4 M_ RE F R _ H C L K _ CP U R _ H C L K _ CP U# R _ H C L K _ MCH R _ H C L K _ MCH# 4 2 4 2 3 RP 2 1 4 P 2 R-S -33 3 RP 4 1 4 P 2 R-S -33

R 141 1 H C L K _ CP U 5 H C L K _ CP U# 5

2

33 C L K _ E N# 13 S T P _ P CI# 6 ,1 3 ,3 3 S T P _ CP U#

H C L K _ MCH 7 H C L K _ MCH# 7 1 C 529 *1 0 P

CPU2_ITP/SRC7 CPU2#_ITP/SRC7#

SMbus address D2
23 T I_ F L A S H_ 48M 13 C L K 4 8 _ US B 6 ,8 S E L P S B 1 _ CLK 6 ,8 S E L P S B 2 _ CLK R 148 1 R 158 1 R 137 1 * 1 0 K _ NC R 150 2 S E L P S B 0 _ CLK 1 *0_NC R 156 2 S E L P S B 1 _ CLK 1 *0_NC R 330 2 S E L P S B 2 _ CLK 1 1 0 K -0402 2 * 0 _ NC 2 * 1 0 K _ NC 2

C G CL K _ S MB C GDA T _ S MB R 135 1 R 140 1 S E L P S B 1 _ CLK S E L P S B 2 _ CLK R 4 2 7 2 10 2 10 4 .7 K _ 4 V D D R E F _ CR C L K V DD + 3 V R UN + V CCP C L K V DD1 C L K V DD S E L P S B 0 _ CLK

46 47 12 16 53 48 42 1 7 21 28 34 11 IRE F 39

SCLK SDATA

CK-410M

SRC6 SRC6# SRC5 SRC5# SRC4 SRC4# SRC3 SRC3# SRC2 SRC2# SRC1 SRC1# SRC0 SRC0# PCI5 PCI4 PCI3 PCI2 PCIF1 PCIF0/ITP_EN

FSA/USB_48 FSB/TEST_MODE FSC/TEST_SEL VDD_REF VDD_CPU VDD_PCI_1 VDD_PCI_2 VDD_SRC0 VDD_SRC1 VDD_SRC2 VDD_48 IREF

B

V D D 4 8 _ CR

FSB and FSC are directly controlled by Dothan-B
4 P 2 R-S -3 3 4 2 RP 3

1 R 332

2 4 7 5 /F

8 DOT 9 6 8 DOT 9 6 #

3 1

R _ DOT 9 6 R _ DOT 9 6 #

14 15

DOT96 DOT96#

+ 3 V R UN

2 4

C

13 P DA T _ S MB

P DA T _ SMB

1 3

Connect ICH6 SMB

RP 1 4 P 2 R-S -1 0K Q 43 3 R H U 0 0 2 N0 6 + 3 V R UN Q 44 3 2 2

Connect DDR Module's SMB
C GDA T _ S MB 15

CT_0505: Change footprint to TSSOP56-8_1-5 from TSSOP56-240
L24 + 3 V R UN 2 1 A CB 2 0 1 2 L -120

13 51 2 6 29 45

GND_48 GND_REF GND_PCI_1 GND_PCI_2 GND_SRC GND_CPU

Iref=5mA, Ioh=4*Iref

CK-410M PIN 35,36 Strap Pin. for ITP or PCIE using.

Tie to VCC (Logic 1) is for ITP using. Tie to GND (Logic 0) is for PCIE using.
C L K V DD1 1 1 C 168 .0 4 7 U/1 0 V _ 4 C 159 . 0 4 7 U/1 0 V _ 4 1 C 152 4 .7 U/1 0 V _ 8 CL K _ P CIE _ S A TA CL K _ P CIE _ S A T A# C L K _ P C IE _ ICH C L K _ P CIE _ ICH# V D D 4 8 _ CR C 174 .0 4 7 U/1 0 V _ 4 C 147 4 .7 U/1 0 V _ 8 D R E F S S CL K D R E F S S CL K # D OT 9 6 DOT 9 6 # R 159 1 R 162 1 R 153 1 R 155 1 2 4 9 .9 /F 2 4 9 .9 /F 2 4 9 .9 /F 2 4 9 .9 /F 1 1 R 177 1 R 184 1 R 170 1 R 172 1 2 4 9 .9 /F 2 4 9 .9 /F 2 4 9 .9 /F 2 4 9 .9 /F C L K _ MCH_ 3 GP L L R 1 6 4 1 C L K _ MCH_ 3 GP L L # R 1 6 6 1 2 4 9 .9 /F 2 4 9 .9 /F
C

1

C GDA T _ S MB

These are for backdrive issue
13 P CL K _ S MB P CL K _ S MB

CT_0229: Change MOS to RHU002N06 due to layout concern.
C G CL K _ S MB C G CL K _ S MB 15

1 2 0 o h m s @ 100Mhz

2

2

1

R 121 1

2 .2 2

R H U 0 0 2 N0 6

2

+ 3 V R UN

1

1

1

1

1 2 0 o h m s @ 100Mhz

C 184

C 199

C 207

C 197

1

L30 1 2 A CB 2 0 1 2 L -120

.0 4 7 U/1 0 V _ 4

. 0 4 7 U/1 0 V _ 4

C L K V DD C 210 R 142 1 1R 2 1 V D D R E F _ CR C 172 . 0 4 7 U/1 0 V _ 4

2

2

D

R 163 1

2 .2 2 1 C 194 1 .0 4 7 U/1 0 V _ 4 2

V D D A _ CR C 433 4 .7 U/1 0 V _ 8

2

.0 4 7 U/1 0 V _ 4

. 0 4 7 U/1 0 V _ 4

4 .7 U/1 0 V _ 8

Place these termination to close CK410M. Cause those Pin-out is for Current-Mode.
D

2

2

2

2

2

Bypass CAPs need to follow Bypass CAP. Routing Rule, no vias between CAP to CHIPSET VCC Pin or GND.
Size D a te:

2

PROJECT : ED3

Quanta Computer Inc.
D o c u m e n t Nu mb e r

2

2

CLOCK Generator
W e d n e sd a y, Ju n e 1 5 , 2 0 0 5
7

Rev A3A Sheet 17
8

of

38

1

2

3

4

5

6

PDF created with pdfFactory trial version www.pdffactory.com

5

4

3

2

1

CN3 31 32 33 34 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 E D ID C LK E D I DDA T A

V IN
D

D

+3 V A L W D10 13 L I D I C H # 2 B A S 316 L ID5 5 1 # C82 . 1 U/1 0 V _ 4 S W4 3 4 MP U-1 0 1 -6 1 2 + 2 _ 5 V RUN 1 R 309 1 0 0 K _4 D11 32 L I D5 5 1 # 1 B A S 316 2

+ 3 V R UN

INT _ T X L CL K OUT+ INT _ T X L CL K OUTINT _ T X L OUT2+ INT _ T X L OUT2INT _ T X L OUT1+ INT _ T X L OUT1INT _ T X L OUT0+ INT _ T X L OUT0D I S P ON L CDID1 L CDID0 L C D 3V C84 . 1 U/1 0 V _ 4

INT _ T X L CL K OUT+ 8 INT _ T X L CL K OUT- 8 INT _ T X L OUT2+ 8 INT _ T X L OUT2- 8 INT _ T X L OUT1+ 8 INT _ T X L OUT1- 8 INT _ T X L OUT0+ 8 INT _ T X L OUT0- 8

C85

C89 1 0 0 0 P_4

R 65 4 .7 K _4 D I S P ON

4 .7 U/2 5 V -1 2 1 0

+ 3 V R UN

B R I GHT 32 L C D I D 1 13 L C D I D 0 13 E E DID_ 3 V

+ 3 V R UN

R 75 1 0 K -0 402

R73 1 0 K -0 402

3

LID-SWITCH
2 2

Q37 2 N7 0 0 2

L CDID0 L CDID1

L C D _ C O N3 0

C

8 I N T _ B L ON

I N T _ B L ON 2

1 R 308 1 0 0 K _4

3

1

C

Q 11 2 N7 0 0 2

1

32 E C_ F P B A CK #

+ 2 _ 5 V RUN

+ 2 _ 5 V RUN

+ 3 V R UN

2

R 3 22 2 .2 K _ 4 1

R 3 23 2 .2 K _ 4 3 E D ID C LK

8 I _ E D I DCL K

B S S 1 38 Q 3 9 + 2 _ 5 V RUN
B

+ 2 _ 5 V RUN

+ 3 V R UN
B

2

R 3 20 2 .2 K _ 4 1

R 3 21 2 .2 K _ 4 3 E D I DDA T A

8 I _ E D IDDA T A

B S S 1 38 Q 3 8

+ 2 _ 5 V RUN

+ 3 V R UN 2

+ 3 V R UN

R 3 29 1 0 K -0 402 2 1 C 1 28 . 1 U/1 0 V _ 4 Q 42 2 N7 0 0 2 4 3 R 328 Q57 2 N7 0 0 2 E C_ F P B A CK # 2 * 0 _ 4 _ NC 6 U 20

TRACE 80MIL
L21 IN IN ON/OFF A A T 4 280_3 OUT GND GND 1 2 5 L C D3 V _ 1 C 127 . 1 U/1 0 V _ 4 C 129 T 1 0 U/1 0 V C 98 . 1 U/1 0 V _ 4 C 100 . 0 1 U/1 6 V _ 4 0_8 L C D 3V C 111 T 1 0 U/1 0 V

8 I N T _ DIS P _ ON

I N T _ DIS P _ ON

1

3

3

A

A

PROJECT : ED3
1

Quanta Computer Inc.
Size D a te: D o c u m e n t Nu mb e r

LCD Connector
W e d n e sd a y, Ju n e 1 5 , 2 0 0 5 Sheet
1

Rev A3A 18 of 38

5

4

3

2

PDF created with pdfFactory trial version www.pdffactory.com

A

B

C

D

E

32 S US L E D_ B L UE #

Q58 R 446 *1 0 K _ 6 Q35 R 447
4

+5 V S US

* P DT C1 4 4 E U *2 0 0 _ 6 3

2

* P DT C1 4 4 E U 3

2

S US L E D_ B L UE #

1

1

S US _ B L UE #

32 S US L E D_ A MB E R#

Q56 R 448 *1 0 K _ 6 Q36 R 449 * P DT C1 4 4 E U *2 0 0 _ 6 3 * P DT C1 4 4 E U 3 2

2

S US L E D_ A MB E R#

Reserved for EMI now pop 0ohm
31 V G A _ RE D 1 31 V G A _ GRN 31 V GA _ B L U 1 S US _ A MB E R# L54 2 L55 2 L56 2 B K 1 0 01 HS 1 21 5 B K 1 0 01 HS 1 21 5 B K 1 0 01 HS 1 21 5

4

+5 V S US

P A D2 5 + 5 V R UN + 3 V R UN C 562 C 2 18 1 5 . 1 U/1 0 V _ 4 V G A _ H S Y NC U 26 A H C T 1 G1 2 5 DCH 1 R 300 C 563 1 0 K _4 + 5 V R UN 2 4 R 453 2 1 39 31 31 31 31 1 2 ,3 1 ,3 2 P R _ V S Y NC P R_HS Y NC P R _ D D C C LK P R _ D D C DA T M _ S E N# *1 0 P _ 4 C N5 1 2 3 4 5 6 7 8 9 10 11 12 3 8 0 0 -12 8 I N T _ H S Y NC V G A _ V S Y NC 2 4 U 24 A H C T 1 G1 2 5 DCH R 454 2 1 39 13 *1 0 P _ 4 * S U - 2 7 _ NC C 561 *1 0 P _ 4 1

P A D6 1 * S U - 2 7 _ NC P A D2 8 1 * S U - 2 7 _ NC P A D2 6 1

P A D4 1 * S U - 2 7 _ NC

2

8 I N T _ V S Y NC
3

3

2

* S U - 2 7 _ NC

R 167 1 K -0 402 5 1 1

14

P A D2 3 1

+ 2 _ 5 V RUN

+ 5 V R UN * S U - 2 7 _ NC P A D3 1 P A D2 1 * S U - 2 7 _ NC

R 180 2 .2 K _ 4

R 175 2 .2 K _ 4

Q23 2 N7 0 0 2 3

R 179 2 .2 K _ 4

R 178 2 .2 K _ 4 * S U - 2 7 _ NC P A D1 1

8 I N T _ D D C CL K

1

2

R 171

0_4

+ 2 _ 5 V RUN * S U - 2 7 _ NC P A D5
2

2

8 I N T _ D D CDA T

1

2

3 Q24 2 N7 0 0 2

1 * S U - 2 7 _ NC

*H-T S 9 B S 8 I3 _ 8 D2 _ 8P2 H O LE19 H OL E 1 1 H OL E 1 5 * H -C3 1 5 I1 5 0 D1 1 0 P 2 * H -T C8 B C9 I3 _ 8 D2 _ 8 P 2

H O LE2 H O LE3 H OL E 2 3 * H -C3 5 4 I1 5 0 D1 1 0 P 2 * H -C3 1 5 I1 5 0 D1 1 0 P 2 * H -C3 1 5 I1 5 0 D1 1 0 P 2

TV-Board fixing Nut
H OL E 8 H OL E 5 * H -C3 1 5 I1 5 0 D1 1 0 P 2 * H -C3 1 5 I1 5 0 D1 1 0 P 2 1 1 1 1 1 1

P A D7 1 * S U - 2 7 _ NC

P A D2 4 1 * S U - 2 7 _ NC

1

1

1

1

1

1

1

CPU SOCKET
1

H O LE6 H - C2 3 6 D1 5 7 P 2 H O LE14 H OL E 1 3 H OL E 1 0 * H -C3 1 5 I1 5 0 D1 1 0 P 2 * H -C3 1 5 I1 5 0 D1 1 0 P 2 * H -C3 1 5 I1 5 0 D1 1 0 P 2 H OL E 2 1 * H -C3 1 5 I1 5 0 D1 1 0 P 2 H OL E 1 8 * H -C3 1 5 I1 5 0 D1 1 0 P 2 H O LE1 * H -C3 1 5 I1 5 0 D1 1 0 P 2

1 H O LE7 H - C2 3 6 D1 5 7 P 2

H O LE20 H O LE4 H OL E 1 6 * H -C3 1 5 I1 5 0 D1 1 0 P 2 * H -C3 1 5 I1 5 0 D1 1 0 P 2 * H -C3 1 5 I1 5 0 D1 1 0 P 2

H O LE17 H OL E 1 2 * H -C3 1 5 I1 5 0 D1 1 0 P 2 * H -C3 1 5 I1 5 0 D1 1 0 P 2

H OL E 2 2 * H -C3 1 5 I1 5 0 D1 1 0 P 2

H OL E 9 H - C2 3 6 D1 5 7 P 2

1

1

1

1

PROJECT : ED3

1

1

1

1

1

1

Quanta Computer Inc.
Size D a te: D o c u m e n t Nu mb e r

CRT & TV Connector
W e d n e sd a y, Ju n e 1 5 , 2 0 0 5 Sheet
E

Rev A3A 19 of 38

A

B

C

D

PDF created with pdfFactory trial version www.pdffactory.com

1

2

3

4

5

6

7

8

PATA HDD SATA HDD
C N20 +5VHDD
A

HD D _CON

1.5A
L29

2

1

+ 5VRUN

+ 3VRUN

22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

R186 +3VHDD L31

2

1

+ 3VRUN

2

BLM18PG181SN1

-IDERST PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0 PDDREQ PDIOW# PDIOR# P I ORDY PDDACK# IRQ14 PDA1 PDA0 PDCS1# HDDLED#

4.7K_4

1

BLM18PG181SN1

+5VHDD

+3VHDD

12,24 HDDLED# R174

44 42 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2

43 41 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1
C N19

PDD[0..15] PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 PDCS1# PDCS3# PDA0 PDA1 PDA2 PDIOR# PDIOW# P I ORDY IRQ14 PDDREQ PDDACK#

PDD[0..15] 12 PDCS1# 12 PDCS3# 12 PDA0 12 PDA1 12 PDA2 12 PDIOR# 12 PDIOW# 12 P I ORDY 12 IRQ14 12 PDDREQ 12 PDDACK# 12

A

POP FOR MASTER
R187 CSEL1

1
470_4

2
R182

PDIAG# PDA2 PDCS3# +5VHDD

1

2
*5.6K_NC

PDDREQ

C435 SATA_TXP0 SATA_TXN0 SATA_RXN0 SATA_RXP0 C436

SATA

1 1

2 2

*3900P *3900P

SATA_RXP0_C 12 SATA_RXN0_C 12

10K-0402

+5VHDD SATA_RXN0 12 SATA_RXP0 12 C215 C221 .1U/16V_6 C220 1000P_4 4.7U_10V C214 *10U_10V_NC + 3VRUN + 5VRUN
B

B

2

*SUYIN-200138_HDD 13 RST_HDD# +5VHDD 8,12,13,31,32 PLTRST# R191 0_4

R192 10K-0402

R190

*0_4_NC

1
Q27 DTC144EU

3

-IDERST

ODD
R410 13 ICH_GPO19 *0_4 R409 *10K-0402 -IDERST PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0 PDIOW# P I ORDY IRQ14 PDA1 PDA0 PDCS1# 24 CDLED# CDLED# +5VODD R281 *10K-0402 C N25

2

CDLED#

2

C

1

3

3

1

HDDLED#

Q48 *2N7002

Q49 *2N7002

R469

0-0402

RCSEL

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50

PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 PDDREQ PDIOR# PDDACK# PDIAG# PDA2 PDCS3#

C

+5VODD C385 .1U/10V_4 C384 1000P_4 C386 1000P_4 C387 150U/6.3V_7

+5VODD

R282 *470_NC

D

1

NC FOR SLAVE

51 52

51 52

2

CON50_LP

D

+5VODD

L37

2

1

+ 5VRUN

PROJECT : ED3

BLM18PG121SN

Quanta Computer Inc.
Size Document Number

2.0A

HDD & CDROM Connector
D ate:
1 2 3 4 5 6

R ev A3A 20
8

W ednesday, June 15, 2005
7

Sheet

of

38

PDF created with pdfFactory trial version www.pdffactory.com

8

7

6

5

4

3

2

1

D

D

U 2 7B U 27A 1 2 ,2 4 ,2 5 A D [ 0 ..3 1 ] A D [ 0 ..3 1 ] A D0 A D1 A D2 A D3 A D4 A D5 A D6 A D7 A D8 A D9 A D1 0 A D1 1 A D1 2 A D1 3 A D1 4 A D1 5 A D1 6 A D1 7 A D1 8 A D1 9 A D2 0 A D2 1 A D2 2 A D2 3 A D2 4 A D2 5 A D2 6 A D2 7 A D2 8 A D2 9 A D3 0 A D3 1 W13 N11 U12 V12 W12 R11 U11 V11 N10 R10 U10 V10 N9 R9 U9 V9 R7 U6 V6 W6 P6 R6 U5 V5 V4 U4 V3 W2 U3 V2 V1 U2 W11 W9 W7 W4 1 0 0 /F *6 8 _ 4 W5 P5 1 2 ,2 4 ,2 5 P A R 1 2 ,2 4 ,2 5 S E R R# 1 2 ,2 4 ,2 5 P E R R# 1 2 ,2 4 ,2 5 S T OP# 1 2 ,2 4 ,2 5 I R D Y # 1 2 ,2 4 ,2 5 T R D Y # 1 2 ,2 4 ,2 5 P C IRS T # 1 2 ,2 4 ,2 5 DE V S E L # 1 2 ,2 4 ,2 5 F RA ME # 12 G NT 1 # 12 R E Q1 # P AR S E R R# P E R R# S T OP# IR DY # TRDY # P C IRS T # DE V S E L # F RA ME # P9 U8 V8 W8 U7 R8 R3 N8 V7 T2 U1 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 C/BE0# C/BE1# C/BE2# C/BE3# IDSEL PCLK PAR SERR# PERR# STOP# IRDY# TRDY# PRST# DEVSEL# FRAME# GNT# REQ# VCCP0 VCCP1 VR_EN# VR_PORT0 VR_PORT1 VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 GND0 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 GND14 GND15 DATA CLOCK LATCH GRST# W3 W10 H2 H1 M19 + 3 V S US H8 H9 H10 H11 H12 J8 J12 K8 K12 M7 M9 M10 M12 N7 G7 G8 G13 H13 J9 J10 J11 K9 K10 K11 L8 L9 L10 L11 L12 M8 N1 L6 N2 T1 1 R 441 N3 M5 P1 P2 P3 N5 R1 R 270 2 *0_NC P C IRS T # C 547 0 .22U MFUNC0 MFUNC1 MFUNC2 MFUNC3 MFUNC4 MFUNC5 MFUNC6 P I RQA # 1 2 ,2 5 P I R Q C# 12 P I R Q D# 1 2 ,2 4 S E R I RQ 1 2 ,1 3 ,2 4 ,3 1 ,3 2 P L OCK # 12 C A R D _ L E D 2 2 ,2 4 +3 V S US 1 0 K -0 603 C 338 C 459 C 462 C 456 C 452 C 449 C 464 C 315 C 457 C 342 C 450 C 458 C 447 C 453 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 C 4 51 C 4 61 R 3 72 C 465 C 250 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 0_4 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 +3 V S US P19 P17 P18 M13 N15 N18 N19 M15 M14 M17 L19 L18 L17 L15 K18 L13 K17 G17 H15 H14 F18 G15 E19 E17 D18 C19 D17 C16 A17 B16 A16 B15 M18 K14 G18 F15 H18 G19 J13 H17 H19 J17 K13 J18 B18 E18 J15 B19 J19 A18 F17 N17 K15 C18 F19 N13 B17 C17 F14 A15 D19 K19 B_D3/B_CAD0 B_D4/B_CAD1 B_D11/B_CAD2 B_D5/B_CAD3 B_D12/B_CAD4 B_D6/B_CAD5 B_D13/B_CAD6 B_D7/B_CAD7 B_D15/B_CAD8 B_A10/B_CAD9 B_CE2#/B_CAD10 B_OE#/B_CAD11 B_A11/B_CAD12 B_IORD#/B_CAD13 B_A9/B_CAD14 B_IOWR#/B_CAD15 B_A17/B_CAD16 B_A24/B_CAD17 B_A7/B_CAD18 B_A25/B_CAD19 B_A6/B_CAD20 B_A5/B_CAD21 B_A4/B_CAD22 B_A3/B_CAD23 B_A2/B_CAD24 B_A1/B_CAD25 B_A0/B_CAD26 B_D0/B_CAD27 B_D8/B_CAD28 B_D1/B_CAD29 B_D9/B_CAD30 B_D10/B_CAD31 B_CE1#/B_CCBE0# B_A8/B_CCBE1# B_A12/B_CCBE2# B_REG#/B_CCBE3# B_A16/B_CCLK B_A23/B_CFRAME# B_A15/B_CIRDY# B_A22/B_CTRDY# B_A21/B_CDEVSEL# B_A20/B_CSTOP# B_A13/B_CPAR B_A14/B_CPERR# B_WAIT#/B_CSERR# B_INPACK#/B_CREQ# B_WE#/B_CGNT# B_READY/B_CINT# B_A19/B_CBLOCK# B_WP/B_CCLKRUN# B_RESET/B_CRST# B_D14/B_CRSV B_A18/B_CRSV B_VS1#/B_CVS1 B_VS2#/B_CVS2 B_CD1#/B_CCD1# B_CD2#/B_CCD2# B_BVD2/B_CAUDIO B_BVD1/B_CSTSCHG B_D2/B_CRSV VCCB0 VCCB1 P C I7 4 1 1 1 0 K -0 603 28 P CMS P K D 22 2 R 376 +3 V S US 1 3 ,3 1 L P CP D# R 371 1 2 *0_NC 1 1 S S 3 55 1 0 K -0402 S K T A P CL K R R 3 6 5 C 460 10_4 * 1 0 P _ 6 _ NC C C L K 22 A_D3/CAD0 A_D4/CAD1 A_D11/CAD2 A_D5/CAD3 A_D12/CAD4 A_D6/CAD5 A_D13/CAD6 A_D7/CAD7 A_D15/CAD8 A_A10/CAD9 A_CE2#/CAD10 A_OE#/CAD11 A_A11/CAD12 A_IORD#/CAD13 A_A9/CAD14 A_IOWR#/CAD15 A_A17/CAD16 A_A24/CAD17 A_A7/CAD18 A_A25/CAD19 A_A6/CAD20 A_A5/CAD21 A_A4/CAD22 A_A3/CAD23 A_A2/CAD24 A_A1/CAD25 A_A0/CAD26 A_D0/CAD27 A_D8/CAD28 A_D1/CAD29 A_D9/CAD30 A_D10/CAD31 A_CE1#/CCBE0# A_A8/CCBE1# A_A12/CCBE2# A_REG#/CCBE3# A_A16/CCLK A_A23/CFRAME# A_A15/CIRDY# A_A22/CTRDY# A_A21/CDEVSEL# A_A20/CSTOP# A_A13/CPAR A_A14/CPERR# A_WAIT#/CSERR# A_INPACK#/CREQ# A_WE#/CGNT# A_READY/CINT# A_A19/CBLOCK# A_WP/CCLKRUN# A_RESET/CRST# A_D14/CRSV A_A18/CRSV A_VS1#/CVS1 A_VS2#/CVS2 A_CD1#/CCD1# A_CD2#/CCD2# A_BVD2/CAUDIO A_BVD1/CSTSCHG A_D2/CRSV VCCA0 VCCA1 E14 B14 A14 E13 C14 A13 F12 C13 E12 A12 B12 C12 B11 C11 G11 E11 A10 A7 B7 C7 G9 B6 C6 B5 E6 A4 B4 B1 C2 D3 C1 D1 G12 B10 F9 C5 E9 C8 B8 A8 C9 A9 G10 F10 B3 E7 B9 C4 E10 C3 A6 B13 C10 A3 E8 C15 E5 A2 B2 D2 V CCCB A5 A11 CB 1 CB 2 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 S K T A P CL K R C F R A ME # 22 C I R D Y # 22 C T R D Y # 22 C DE V S E L # 22 CS T OP # 22 C P A R 22 C P E R R# 22 C S E R R# 22 C R E Q # 22 C G N T # 22 C I N T # 22 C B L OCK # 22 C C L K R U N # 22 C R S T # 22 A _ D 1 4 /CRS V 22 A _ A 1 8 /CRS V 22 C V S 1 22 C V S 2 22 C C D 1 # 22 C C D 2 # 22 C A U D I O 22 C S T S CHG 22 A _ D 2 /CRS V 22 C A D 0 22 C A D 1 22 C A D 2 22 C A D 3 22 C A D 4 22 C A D 5 22 C A D 6 22 C A D 7 22 C A D 8 22 C A D 9 22 C A D 1 0 22 C A D 1 1 22 C A D 1 2 22 C A D 1 3 22 C A D 1 4 22 C A D 1 5 22 C A D 1 6 22 C A D 1 7 22 C A D 1 8 22 C A D 1 9 22 C A D 2 0 22 C A D 2 1 22 C A D 2 2 22 C A D 2 3 22 C A D 2 4 22 C A D 2 5 22 C A D 2 6 22 C A D 2 7 22 C A D 2 8 22 C A D 2 9 22 C A D 3 0 22 C A D 3 1 22 C C BE0# C C BE1# C C BE2# C C BE3# 22 22 22 22

if - VR_EN pu ll- low , VR_PO RT an d VDPLL_15 will be 1 . 5 V outpin.

PCI BUS

C

PC CARD / CARD BUS INTERFACE

C

1 2 ,2 4 ,2 5 1 2 ,2 4 ,2 5 1 2 ,2 4 ,2 5 1 2 ,2 4 ,2 5

C /BE0# C /BE1# C /BE2# C /BE3# A D1 7 C 3 2 6 *1 0 P _ 4

C /B E 0 # C /B E 1 # C /B E 2 # C /B E 3 # R 259 R 246

CORE LOGIC PWR

17 P CL K _ P CM

+3 V S US

T P S DATA 22 T P S CL OCK 22 T P S L A T CH 22 G RS T #

R 450 100K 2 D 2 5 * 1 S S 3 5 5 _ NC 1 GRS T # _ 7 4 11 32

B

B

1 2 ,2 4 ,2 5 ,3 1 PME#

T3 L7 R2

RIOUT#/PME# SPKROUT SUSPEND#

IOPJ2-7 of NS97551 have internally weak pull up

+3 V S US P CI7 4 1 1 R 3 68

Multifunction& Miscellaneous

Item74

G RS T #
A

G RS T # 22

A

PROJECT : ED2

Quanta Computer Inc.
Size D a te:
8 7 6 5 4 3

D o c u m e n t Nu mb e r

PCMCIA TI7411
W e d n e sd a y, Ju n e 1 5 , 2 0 0 5
2

Rev A3A Sheet 21
1

of

38

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8

7

6

5

4

3

2

1

C N4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

PCMCIA SOCKET

D

21 C A D 0 21 C A D 1 21 C A D 3 21 C A D 5 21 C A D 7 21 C C B E 0 # 21 C A D 9 21 C A D 1 1 21 C A D 1 2 21 C A D 1 4 21 C C B E 1 # 21 C P A R 21 C P E R R# 21 C G N T # 21 C I N T # V CCCB V P P CB 21 C C L K 21 C I R D Y # 21 C C B E 2 # 21 C A D 1 8 21 C A D 2 0 21 C A D 2 1 21 C A D 2 2 21 C A D 2 3 21 C A D 2 4 21 C A D 2 5 21 C A D 2 6 21 C A D 2 7 21 C A D 2 9 21 A _ D 2 /CRS V 21 C C L K R U N #

GND D3 - CAD0 D4 - CAD1 D5 - CAD3 D6 - CAD5 D7 - CAD7 CE1- CCBE0 A10- CAD9 OE - CAD11 A11- CAD12 A9 - CAD14 A8 - CCBE1 A13- CPAR A14- CPERR WE/PGM - CGNT RDY/BSY,IRQ*INT VCC VPP1 A16- CCLK A15- CIRDY A12- CCBE2 A7 - CAD18 A6 - CAD20 A5 - CAD21 A4 - CAD22 A3 - CAD23 A2 - CAD24 A1 - CAD25 A0 - CAD26 D0 - CAD27 D1 - CAD29 D2 - RFU WP,IOIS16-CKRUN GND GND CD1- CCD1 D11- CAD2 D12- CAD4 D13- CAD6 D14- RFU D15- CAD8 CE2- CAD10 RFSH,VS*1-CVS1 IORD-CAD13 IOWR-CAD15 A17- CAD16 A18- RFU A19- CBLOCK A20- CSTOP A21- CDEVSEL VCC VPP2 A22- CTRDY A23- CFRAME A24- CAD17 A25- CAD19 NC - CVS2 RESET-CRST WAIT-CSERR INPACK-CREQ REG- CCBE3 BVD2,SP-CAUDIO BVD1,STSCHG-C* D8 - CAD28 D9 - CAD30 D10- CAD31 CD2- CCD2 GND

MC_PWR_CTR low active(default) , or change register to high active

U27C M C _ CT RL 0 # T68 - M S CD - S DCD - S M CD 33_4 M S CL K /S DCL K /-S ME L W P _ P CI7 4 1 1 M S B S /S DCMD/-S MW E M S / S D/S M D3 M S / S D/S M D2 M S / S D/S M D1 M S / S D/S M D0 S M_ RE # S M_ ALE F1 F2 F5 E3 F6 G5 F3 H5 G3 G2 G1 J5 J3 H3 J6 J1 J2 H7 J7 K1 K2 L5 L2 K5 K3 L1 L3 MC_PWR_CTRL_0 MC_PWR_CTRL_1 MS_CD# SD_CD# SM_CD#
D

M S CL K /S DCL K /-S ME L W P R 3 7 5

MS_CLK//SD_CLK//SM_EL_WP# MS_BS//SD_CMD//SM_WE# MS_DATA3//SD_DAT3//SM_D3 MS_DATA2//SD_DAT2//SM_D2 MS_DATA1//SD_DAT1//SM_D1 MS_SDIO(DATA0)//SD_DAT0//SM_D0 SM_RE# SM_ALE SM_D4 SM_D5 SM_D6 SM_D7 SD_WP//SM_CE#

Flash Media Layout Guidelines: 1. Signal traces should be 60 Ohm +/- 10%. 2. All signal traces should be routed with equal propagation delay, and with trace lengths as short as practical. 3. A 56 Ohm damping resistor for MS_CLK and SD_CLK should be placed near the PCI7411 source.
S M_ D4 S M_ D5 S M_ D6 S M_ D7 S D _ W P /-S MCE S M _ CL E /S C_ GP IO0 S M _ R / B # /S C_ RF U T79 T130

Six For 1 Card
SM_CLE//SC_GPIO0 SM_R/B#//SC_RFU SM_PHYS_WP#//SC_FCB SC_PWR_CTRL SC_CD# SC_CLK SC_RST SC_DATA SC_OC# SC_VCC_5V P CI7 4 1 1
C

IRLML5103 Rds(on)=0.6
+3 V S US 1 Q46 IRL ML 5 1 0 3 3 C 511 . 1 U/1 0 V _ 4 C 503 1 0 U_ 6 .3 V _ 8 R 397 * 1 0 0 K _ NC M B _ V CC +5 V S US R 217

T75 T78 T69 T77 T131

C

21 C C D 1 # 21 C A D 2 21 C A D 4 21 C A D 6 21 A _ D 1 4 /CRS V 21 C A D 8 21 C A D 1 0 21 C V S 1 21 C A D 1 3 21 C A D 1 5 21 C A D 1 6 21 A _ A 1 8 /CRS V 21 C B L OCK # 21 C S T OP # 21 C D E V S E L # V CCCB V P P CB 21 C T R D Y # 21 C F R A ME # 21 C A D 1 7 21 C A D 1 9 21 C V S 2 21 C R S T # 21 C S E R R# 21 C R E Q # 21 C C B E 3 # 21 C A U D I O 21 C S T S CHG 21 C A D 2 8 21 C A D 3 0 21 C A D 3 1 21 C C D 2 #

1 0 K -0603 S C _ V CC5 V K7

+3 V S US

R 3 87

8 .2 K

2

T P S DATA T P S CL OCK T P S L A T CH

C 141 C 142 C 143 C 134 C 133 C 132 C 135 C 136

* 1 0 P _ 4 _ NC * 1 0 P _ 4 _ NC * 1 0 P _ 4 _ NC . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 1 0 U_ 6 .3 V _ 8 . 1 U/1 0 V _ 4 1 0 U_ 6 .3 V _ 8

M C _ CT RL 0 #

+ 3 V S US

V CCCB V P P CB

1

Q47 * IRL ML 5 1 0 3 3

2

2

2

2 1 ,2 4 C A R D _ L E D 1

D23 *1 S S 3 55 - S DCD 1

D 24 *1 S S 3 55

TI Erratum

B

GND GND GND GND GND GND

- S M CD

4 IN1 CARD READER (XD,MMC/SD,MS)
M B _ V CC CN10 - S DCD M S / S D/S M D2 M S / S D/S M D3 M S B S /S DCMD/-S MW E 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 CD_SD DAT2_SD CD/DAT3_SD CMD_SD VSS_SD VDD_SD CLK_SD VSS_SD DAT0_SD DAT1_SD WP_SD VSS_MS VCC_MS SCLK_MS RESERVE_MS INS_MS RESERVE_MS SDIO_MS RESERVE_MS BS_MS VSS_MS GND MS X 039-X0-0X00 VCC VCC_XD D7_XD D6_XD D5_XD D4_XD D3_XD D2_XD D1_XD D0_XD GND_XD -WP_XD -WE_XD ALE_XD CLE_XD -CE_XD -RE_XD R/-B_XD GND_XD GND GND 43 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 42 M B _ V CC

B

69 70 71 72 73 74

S A NT A -1 3 0 6-68P

+3 V S US

C 488 C 491

4 .7 U/1 0 V _ 8 . 1 U/1 0 V _ 4

M S CL K /S DCL K /-S ME L W P M S / S D/S M D0 M S / S D/S M D1 S D _ W P /-S MCE M S CL K /S DCL K /-S ME L W P M S / S D/S M D3 - M S CD M S / S D/S M D2 M S / S D/S M D0 M S / S D/S M D1 M S B S /S DCMD/-S MW E

U 21 +5 V S US 21 T P S DATA 21 T P S CL OCK 21 T P S L A T CH V P P CB V CCCB T P S DATA T P S CL OCK T P S L A T CH 1 2 3 4 5 6 7 8 9 10 11 12 5V_0 5V_2 5V_1 NC_4 DATA NC_3 CLOCK SHDN# LATCH 12V_1 NC_1 BVPP/BVCORE 12V_0 BVCC1 AVPP/AVCORE BVCC0 AVCC0 NC_2 AVCC1 OC# GND 3.3VIN0 RESET# 3.3VIN1 NC_5 25 24 23 22 21 20 19 18 17 16 15 14 13 +5 V S US C 145 C 178 1 0 U_ 6 .3 V _ 8. 1 U/1 0 V _ 4 C 144 4 .7 U/1 0 V _ 8

S M_ D7 S M_ D6 S M_ D5 S M_ D4 M S / S D/S M M S / S D/S M M S / S D/S M M S / S D/S M

D3 D2 D1 D0

+3 V S US C 1 80 4 .7 U/1 0 V _ 8 C 181 1 0 U_ 6 .3 V _ 8 C 179 . 1 U/1 0 V _ 4

M S CL K /S DCL K /-S ME L W P M S B S /S DCMD/-S MW E S M_ ALE S M _ CL E /S C_ GP IO0 S D _ W P /-S MCE S M_ RE # S M _ R / B # /S C_ RF U - S M CD

21 G RS T #
A

T P S 2 2 2 0 A (DB)

A

PROJECT : ED3

Quanta Computer Inc.
Size D a te:
8 7 6 5 4 3

D o c u m e n t Nu mb e r

PCMCIA Socket & 4-IN-1
W e d n e sd a y, Ju n e 1 5 , 2 0 0 5
2

Rev A3A Sheet 22
1

of

38

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1

2

3

4

5

6

7

8

U 27D

1394(FIREWIRE)
CNA P15
A

T119

L1394_TPA0+ L1394_TPA0L1394_TPB0+ L1394_TPB0C255 C273 C445 C448 * 5 .6 P _NC * 5 .6 P _NC * 5 .6 P _NC * 5 .6 P _NC

CPS

M11

A

PHY PORT 0

TPA0+ TPA0TPB0+ TPB0TPBIAS0 R0 R1 XO

V15 W15 V14 W14 U15 U18 U19 R19

+1394TPA0 -1394TPA0 +1394TPB0 -1394TPB0 1394BIAS0 1394_R0 1394_R1 1394X1-10MIL Y4 6X24500018 R216

R224 R235 R357 R363

5 6 .2/F_6 5 6 .2/F_6 5 6 .2/F_6 5 6 .2/F_6

C278 R348 C455

1 U/10V_6 5 .11K/F_6 220P_6

6 .34K/F_6

BIAS CURRENT

10MIL
L1394_TPA0+ C443 12P_4 L1394_TPA0-

L3 PLW3216S900SQ2T1 <P N> F_TPA0P 2 1

J1 020115FB004S504ZL 5 4 3 2 1 6

CRYSTAL
B

24.576MHz
C440 12P_4 2.7K_4 2.7K_4 * 2 2 0_4_NC * 2 2 0_4_NC 5 6 .2/F_6 5 6 .2/F_6 5 6 .2/F_6 5 6 .2/F_6 C442 R213 C245 L1394_TPB0+ L1394_TPB02 3 1 4 F_TPB0P F _ TPB0N

EEPROM BUS

SDA SCL

M2 M3

1394_SDATA 1394_SCLK

R369 R373 R370 R374

+3 V SUS

L4 PLW3216S900SQ2T1 <P N>

PHY PORT 1

TPA1+ TPA1TPB1+ TPB1TPBIAS1

V18 W18 V16 W16 U17

+1394TPA1 R359 -1394TPA1 R358 +1394TPB1 R215 -1394TPB1 R214 1394BIAS1 P C0 R364 R366 R239 R238 R244 R243

1 U/10V_6 5 .11K/F_6 220P_6

POWER CLASS
C

PC0 PC1 PC2

R12 U13 P C1 V13 P C2

* 0 _ 4 _NC 0_4 * 0 _ 4 _NC 0_4 * 0 _ 4 _NC 0_4

+3 V SUS +3 V SUS +3 V SUS 7 1394_SCLK 1394_SDATA 6 5

U2 8 SCL SDA WP NM 24C02 .1 U/10V_4 A0 A1 A2 VCC GND 1 2 3 8 4 +3 VSUS
C

VDPLL_15

T18

C249

.1 U/10V_4 L35

T52 T51 R362 220_6

W17 T19 P12

NC RSVD TEST0

VDPLL_33 AVDD0 AVDD1 AVDD2

V19 R13 R14 V17

VDPLL-33 1

0_8

2 .1 U/10V_4 .1 U/10V_4 .1 U/10V_4

+3 V SUS

C444 C441 C454

T74 T73
D

E2 E1

A_USB_EN# B_USB_EN#

PHY_TEST_MA

R17

R220

4.7K_4 C446 C251

+3 V SUS C246
D

17 TI_FLASH_48M C463 * 2.2P_4
1

M1

CLK_48

AGND0 AGND1 AGND2 VSSPLL0 VSSPLL1

N12 U14 U16 P14 T17

100P_4

.1 U/10V_4 0U_6.3V_8 1

Quanta Computer Inc.
Size Da te : Do cu m e n t Number

R367 *68_4 P CI7411
2 3 4 5 6

IEEE1394
W e d n e sd a y, June 15, 2005
7

PDF created with pdfFactory trial version www.pdffactory.com

1

4

2

XI

R18

1394X2-10MIL

4

3 3

3

1

2

4

F _ TPA0N

B

C3 61

PROJECT : ED3

Rev A 3A Sheet 23 of
8

38

1

2

3

4

5

6

7

8

+ 5V RUN U4 TP S 2062

US B P W R0

L1 B LM21P G600SN1 C N 12

2 3 4
C402 . 1U/ 10V _4

IN EN1# EN2#

GND OUT1 OC1# OUT2 OC2#

1 7 8 6 5 1
C8 . 01U/ 16V_4 US B P W R0 US B OC0# 13 US B P W R1 US B OC1# 13 + C 403 C 401 + 150U/ 6. 3V_7 . 01U/ 16V_4 13 US B P 013 US B P0+

DLW 21HN900S Q2L

1 4
CML1

2 3

4 3 2 1
USB

5 6 7 8

1

2

C 11 150U/ 6. 3V_7 R302 1K -0402 R 303 1K -0402

2

A

2

1

US B P W R1

Each channel is 1A
13 US B P 113 US B P1+

L2 B LM21P G600SN1 C N 13

A

DLW 21HN900S Q2L

1 4
CML2

2 3

4 3 2 1
USB

5 6 7 8

ID Select Interrupt Pin Grant Indicate
32 R F _E N 12, 21 P I RQD#

: AD19 : INTB# , INTD# : GNT2#
D 16 1 B A S 316 + 3V RUN

C N 22

M INI-PCI
RING LAN2 LAN4 LAN6 LAN8 LED_YP LED_YN NC2 +5V -INTA R(IRQ4) +3VAUX -RST +3V -GNT GND -PME (V) AD30 +3V AD28 AD26 AD24 IDSEL GND AD22 AD20 PAR AD18 AD16 GND -FRAME -TRDY -STOP +3V -DEVSEL GND AD15 AD13 AD11 GND AD9 -CBE0 +3V AD6 AD4 AD2 AD0 (V) SERIRQ GND M66EN SDOUT SDIN1 -RESET -MPCICACK AGND +SPK -SPK AGND NC4 +3VAUX GND 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124
+ 5V RUN + 3V RUN U1

Request Indicate : REQ2#
2

C 225 *10P _4 17 P CLK _MINI 12 RE Q2# 12, 21, 25 A D31 12, 21, 25 A D29 12, 21, 25 A D27 12, 21, 25 A D25 12, 21,25 C/ B E 3# 12, 21, 25 A D23
B

R 188

*22_4

C/ B E 3#

12, 21, 25 A D21 12, 21, 25 A D19 12, 21, 25 A D17 12, 21,25 C/ B E 2# 12, 21,25 I R D Y # 12, 25, 31,32 C L K RUN# 12, 21,25 S E RR# 12, 21,25 P E RR# 12, 21,25 C/ B E 1# 12, 21, 25 A D14 12, 21, 25 A D12 12, 21, 25 A D10 12, 21,25 AD8 12, 21,25 AD7 12, 21,25 AD5 12, 21,25 AD3 + 5V RUN 12, 21,25 AD1 C/ B E 2# IRD Y#

1

P E RR# C/ B E 1#

DE V S EL#

32 B T_P W RON# DE V SEL# 12, 21, 25 A D15 12, 21,25 A D13 12, 21,25 A D11 12, 21,25 R F_LE D R 458 *0

2

8 7

1

6 5 4

2

C/ B E 0#

AD9 12, 21,25 C/ B E 0# 12, 21,25 AD6 AD4 AD2 AD0 12, 21,25 12, 21,25 12, 21,25 12, 21,25

Q26 P DTC144E U R F_E N R 464 0

1

3

13 B T_USBP3+

3
13 B T_US BP3B T_LED

2 1 10

S E RIRQ 12, 13, 21, 31,32

B T_LED

R 459

0

2

S M08B -S URS -8P_BLUE LE D8 LE D_B LUE / ORA NGE

Item136
1
+3VALW

3 3
Q25 P DTC144E U

1 2

R 334 R 333

560_6 560_6

+ 5V RUN

4

IT-1188E

SW7

+ 3V RUN

P DTC144E U +3VSUS

2

GND

+ 5V RUN
C

Q20 LE D6 LE D_B LUE / ORA NGE R101 32 B A TLE D_B LUE#

3 1 6 3 4 1 2 2 2
R100

4 2 5

R 161

4. 7K _4

9

S E RR#

1 3 5 7 9 R F_LE D 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123

TIP LAN1 LAN3 LAN5 LAN7 LED_GP LED_GN NC1 -INTB +3V R(IRQ3) GND PCICLK GND -REQ +3V AD31 AD29 GND AD27 AD25 (V) -CBE3 AD23 GND AD21 AD19 GND AD17 -CBE2 -IRDY +3V -CLKRUN -SERR GND -PERR -CBE1 AD14 GND AD12 AD10 GND AD8 AD7 +3V AD5 (V) AD3 +5V AD1 GND SYNC SDIN0 BITCLK -AC_PRIMARY BEEP AGND +MIC -MIC AGND -RI +5VA

4 3 2 1
R1 + 5V RUN P IRQB # 12 +3V_S5 P CIRS T# 12, 21,25 GNT2# 12 MINI_P ME# A D30 12, 21,25 A D28 12, 21,25 A D26 12, 21,25 A D24 12, 21,25 32 P W R_B LUE# A D19 *1K -0402

EN# VCC VCC GND
*G528

OC# VOUT VOUT VOUT

5 6 7 8
C2 C5 *150U/ 6. 3V_7

US B OC4# 13 US B P W R4

T V B o ard R3 ,R4 n e e d to change B OM to 150ohm

CN1

*DLW 21HN900S Q2L

S OIC8-6-1_27 *. 01U/ 16V_4

+ 3V SUS

8 TV _Y /G 8 TV _C/ R

TV _Y /G TV _C/ R

10 9 8 7 6

1 2 3 4 5

1 4
CML4

2 3

US B P4+ 13 US B P 4- 13

*2940-010

US B P W R4

2

Q50 P DTC144E U

OP T ION (DOCK ING ON OR S-VEDIO Board ON)

1
+ 3V SUS

3
LE D1 LE D_B LUE / ORA NGE

+ 3V RUN

R 193

150/ F_4

A D20 PAR

A D22 12, 21,25 A D20 12, 21,25 PAR 12, 21,25 A D18 12, 21,25 A D16 12, 21,25 FRA ME# 12, 21,25 TR DY # 12, 21,25 STOP# 12, 21,25

2

3 4
Q51

1 2

R6 R 411

560_6 200_6

+ 5V SUS + 5V SUS R 258

C339

. 1U/ 10V_4

3

B

Q32 V IN 1M

32 P W R_A MBER#

1

3 P DTC144E U

2 3

2N7002

FRA ME# TR DY # STOP#

CN8 Q31 P DTC144E U B T_V CC

1

3

1 560_6 1 560_6

+5VALW

C

125

126

M I NIP CI_TY P E _III +3VALW

RF_S W # 32

Ora n g e F o rward Voltage 2.0~2.4
2
+3V_S5 P DTC144E U

B l u e F o rward Voltage 3.4~3.8 DC F o rwa rd Cu rrent 20mA

B T_SW# 32

12, 21, 25,31 PME#

3

R195 Q28 2N7002 R 194 4. 7K_6 10K -0603

32 B A TLE D_AMBER#

1
Q21

3

2 3
Q29 2N7002 12, 20 H D DLE D# 20 C DLE D# MINI_P ME# + 3V RUN

LE D2

3 4

LE D_B LUE / ORA NGE R 17 1

SW1 560_6 *560_6 + 5V RUN 32 NB S W ON#

1 2

2

R 20

3 4 5

1

2

MIS A K I_TC004-PS11AT SW2

2

Q7

1

32 BT1# P DTC144E U LE D3 32 CA P S LE D#

1 2

1

3
+ 3V RUN

B LUE _LED R 23

3 4 5

560_6 MIS A K I_TC004-PS11AT

2

SW3 Q9 P DTC144E U LE D4 B LUE _LED R 44 32 BT2#

1 2

3 4 5

32 S CROLE D#
D

1

3
+ 3V RUN

560_6

MIS A K I_TC004-PS11AT

B L UE _ L E D F o rwa rd Voltage 2.8~3.05 DC F o rwa rd Cu rrent 20mA
B LUE _LED R 52 560_6

D

2

Q12 P DTC144E U LE D5 32 N UMLE D# 21, 22 C A RD_LE D

1

3

PROJECT : ED2

2

Quanta Computer Inc.
LE D7

1

3
Q22 P DTC144E U

B LUE _LED R 147

560_6 Size Doc ument Number

M ini PCI, T /P, USB, LED
Dat e: W ednes day , June 15, 2005 S heet
8

Rev A3A 24 of 38

PDF created with pdfFactory trial version www.pdffactory.com

1

2

3

4

5

6

7

5

4

3

2

1

R117 RTL8110SBL(1G)--DEPOP RTL8100L(10,100)--POP
+3 V _ L A N_A +3 V _ S5 + 3 V _ L A N_ D L26 B K 2 1 2 5 HS 220
D

R116 RTL8110SBL(1G)--POP RTL8100L(10,100)--DEPOP
+ 3 V _ L A N_ D +2 P 5 V _ L AN D V D D _ LAN R 112 1 0 K _4 + 3 V _ L A N_ D + 5 V R UN

C 211 . 1 U/1 0 V _ 4

C 2 06 2 2 U-1 2 0 6

C 156

C 1 67

C 213

C 198

C 216

C 219

C 188

R 1 17 0_4

R 116 * 0 _ _ NC_ 4

R 119 R 1 1 1 * 0 _ 4 _ NC L A N_ P ME# P ME # 1 2 ,2 1 ,2 4 ,3 1 L A N_ P ME # 32 IS OL A TEB IS OL A TEB E E DI E E S EL E E CL K E E DO T35 C L K R U N # 1 2 ,2 4 ,3 1 ,3 2 C T RL 2 5 R 118 1 5 K /F _ 4 R 185 3 .6 K E E S EL E E CL K E E DI E E DO 1 2 3 4 1 K -0 402 +3 V _S5 C 200 *1 0 0 P -0 4 0 2 _ NC U25 CS SK DI DO VCC NC NC GND 8 7 6 5 +3 V _S5

D

. 1 U/1 0 V _ 41 U/1 0 V _ 41 U/1 0 V _ 41 U/1 0 V _ 41 U/1 0 V _ 41 U/1 0 V _ 4 0 U/1 0 V _ 8 . . . . . 1 D V D D _ LAN

+3 V _S5

+3 V _ L A N_A L27 B K 1 6 0 8 HS 2 20 U23 C 155 . 1 U/1 0 V _ 4 C 1 83 C 193 1 2 ,2 1 ,2 4 A D [ 0 ..3 1 ] A D0 A D1 A D2 A D3 A D4 A D5 A D6 A D7 A D8 A D9 A D1 0 A D1 1 A D1 2 A D1 3 A D1 4 A D1 5 A D1 6 A D1 7 A D1 8 A D1 9 A D2 0 A D2 1 A D2 2 A D2 3 A D2 4 A D2 5 A D2 6 A D2 7 A D2 8 A D2 9 A D3 0 A D3 1 104 103 102 98 97 96 95 93 90 89 87 86 85 83 82 79 59 58 57 55 53 50 49 47 43 42 40 39 37 36 34 33 92 77 60 44 28

A V D DL

1 2

C 224 . 1 U/1 0 V _ 4

26 41 56 71 84 94 107 3 7 20 32 54 78 99 45 109 106 111 108 31 23 105

64 88 65 8

9 3 C4 6 -3 GR

VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 VDD33 AVDDL AVDDL AVDDL VDD18 VDD18 VDD18 VDD18 VDD18 EEDI EECS EESK EEDO PMEB ISOLATEB LWAKE

. 1 U/1 0 V _ 4 1 0 U/1 0 V _ 8 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 CBE0B CBE1B CBE2B CBE3B CLK

VDD18 M66EN CLKRUNB CTRL25

POWER

EEPROM

VDD33---+3.3V DIGITAL PM AVDDH------+3.3V ANALOG AVDDL-----+2.5V ANALOG DVDD-----+1.8V ANALOG DVDD_A----+1.8VANALOG PCI

C

RTL81XX's power for Co-lay : AS RTL8110SBL(Giga-Lan) AVDDL CONNECT RTL8100L(10,100M-Lan) AVDDL CONNECT AS RTL8110SBL(Giga-Lan) HSDAC- CONNECT RTL8100L(10,100M-Lan) HSDAC- CONNECT AS RTL8110SBL(Giga-Lan) DVDD RTL8100L(10,100M-Lan) DVDD CONNECT CONNECT +2.5V_A +3V_LAN_A +3V_LAN_A +2.5V_A +1.8V_D +2.5V_A

PCI

RTL8110SBL/8100CL

RESERVE

R 120 *22
B

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND I/F LED GND GND

1 2 ,2 1 ,2 4 C /B E 0 # 1 2 ,2 1 ,2 4 C /B E 1 # 1 2 ,2 1 ,2 4 C /B E 2 # 1 2 ,2 1 ,2 4 C /B E 3 # 17 P CL K _ L A N

C /B E 0 # C /B E 1 # C /B E 2 # C /B E 3 # P CL K _ L A N

PAR INTAB GNTB RSTB REQB SERRB IRDYB FRAMEB IDSEL DEVSELB TRDYB PERRB STOPB RSET SMBCLK SMBCLK AVDDH AVDDL HSDAC+ HSDACXTAL1 XTAL2 HV CTRL18 VDD18 VDD18 VDD18 VDD18 MDI3MDI3+ MDI2MDI2+ MDI1MDI1+ MDI0MDI0+ LED0 LED1 LED2 LED3

76 25 29 27 30 75 63 61 46 68 67 70 69 127 74 72 10 16 11 12 121 122 120 125 126 116 110 24 19 18 15 14 6 5 2 1 117 115 114 113

P AR

R _ A D2 4

S E R R# IR DY # F RA ME # R 145 0_6 A D2 4 DE V S E L # TRDY # P E R R# S T OP#

P A R 1 2 ,2 1 ,2 4 P I R QA # 1 2 ,2 1 G NT 0 # 12 P C IRS T # 1 2 ,2 1 ,2 4 R E Q0 # 12 S E R R# 1 2 ,2 1 ,2 4 I R D Y # 1 2 ,2 1 ,2 4 F RA ME # 1 2 ,2 1 ,2 4 DE V S E L # 1 2 ,2 1 ,2 4 T R D Y # 1 2 ,2 1 ,2 4 P E R R# 1 2 ,2 1 ,2 4 S T OP# 1 2 ,2 1 ,2 4

RTL8110SBL(1G)--POP 2.49K RTL8100L(10,100M) POP 5.6K
C

R 1 39 R 1 27

* 2 . 4 9 K _ NC 5 .6 K

A V D DL H S D A C+ H S D A CL A N_ X IN L A N_ X OUT C T RL 1 8 D V D D _ LAN TRD3N T R D3 P TRD2N T R D2 P TRD1N T R D1 P TRD0N T R D0 P A CT L E D# 1 0 0 M_ L INK # 1 0 M_ L INK # 1 0 0 0 M_ L INK# +3 V _ L A N_A D V D D _ LAN

+3 V _ L A N_A R 1 13 L A N_ X IN R 1 49 * 1 M _ NC L A N_ X OUT * 0 _ 6 _ NC C 177 27P Y3 2 5 .0 0 0 0 MHz 2 C 166 27P R 114 R 115 * 0 _ 4 _ NC +3 V _ L A N_A 0_4 +2 P 5 V _ L AN

T R D 3 N 26 T RD3 P 26 T R D 2 N 26 T RD2 P 26 T R D 1 N 26 T RD1 P 26 T R D 0 N 26 T RD0 P 26 A CT L E D# 26 1 0 0 M_ L INK # 26 1 0 M_ L INK # 26 1 0 0 0 M_ L INK # 26

R113,R114 RTL8110SBL(1G)--POP RTL8100L(10,100)--DEPOP

AUI

R108,R115,Q19 RTL8110SBL(1G)--DEPOP RTL8100L(10,100) --POP

1

R412,R414,R416,R418,C531,C533 RTL8110SBL(1G)--POP RTL8100L(10,100)--DEPOP
B

4 35 52 100 80 17 128 124 21 51 66 81 91 101 38 119 123 62 13 48 73 9 22 112 118

C 150 *1 0 P _ 4

+ 3 V _ L A N_ D

3 Q52 C T RL 2 5 1 *2 sb 1 1 88 TRD3N 2 * 4 9 .9 /F _ 4 +2 P 5 V _ L AN R 414 T R D3 P * 4 9 .9 /F _ 4 R 416 TRD2N TRD0N * 4 9 .9 /F _ 4 R 418 T R D2 P +2 P 5 V _ L AN * 4 9 .9 /F _ 4 C 5 3 3 * . 0 1 U_ 4 T R D0 P 4 9 .9 /F _ 4 4 9 .9 /F _ 4 R 419 C 5 3 4 . 0 1 U_ 4 + 3 V _ L A N_ D T R D1 P 4 9 .9 /F _ 4 R 417 C 5 3 1 * . 0 1 U_ 4 R 412 TRD1N 4 9 .9 /F _ 4 R 415 C 5 3 2 . 0 1 U_ 4 R 413 Q19 D V D D _ LAN C T RL 2 5 2 1197 +2 P 5 V _ L AN C 149 2 2 U-1 2 0 6 C 140 R 108 C 139 0_8 D V D D _ LAN 1

Q52 Colayout with Q19 RTL8110SBL(1G)--POP RTL8100L(10,100) --DEPOP

Q18,R124,C138,C157,C151 RTL8110SBL(1G)--POP
+2 P 5 V _ L AN

RTL8100L(10,100) --DEPOP

3 Q18 C T RL 1 8 1 *2 sb 1 1 88 2 R _DV DD C 138 C 157 R 1 24 C 151 * 0 _ 8 _ NC D V D D _ LAN C 1 76 C 2 17 C 1 92 C 1 58 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4 1 0 U/1 0 V _ 8
A

Item103

D V D D _ LAN

* 2 2 U-1 2 0 6 * . 1 U/1 0 V _ 4 * . 1 U/1 0 V _ 4

3

A

. 1 U/1 0 V _ 4 . 1 U/1 0 V _ 4

PROJECT : ED2

Quanta Computer Inc.
Size D a te:
5 4 3 2

D o c u m e n t Nu mb e r

LAN RTL8110S/8100CL
W e d n e sd a y, Ju n e 1 5 , 2 0 0 5 Sheet
1

Rev A3A 25 of 38

PDF created with pdfFactory trial version www.pdffactory.com

A

B

C

D

E

U9 RTL8110SBL(1G)--POP RTL8100L(10,100) --DEPOP
21
C N 15

19

+ 2P 5V _LAN

4

15 17 16 18 1 2 3 4 5 6 7 8 9 12

A CT#

U9 + 3V _LA N_D R J 4 5_TRA N_TRD0N R J45_TRA N_TRD0P MCT4 R J 4 5_TRA N_TRD1N R J45_TRA N_TRD1P MCT3 R J 4 5_TRA N_TRD2N R J45_TRA N_TRD2P MCT2 R J 4 5_TRA N_TRD3N R J45_TRA N_TRD3P MCT1

R 304 2

1 470
R J45_TRA N_TRD0P R J 4 5_TRA N_TRD0N R J45_TRA N_TRD1P R J45_TRA N_TRD2P R J 4 5_TRA N_TRD2N R J 4 5_TRA N_TRD1N R J45_TRA N_TRD3P R J 4 5_TRA N_TRD3N

R 305 2

1 330

100MBPS

13 14 15 16 17 18 19 20 21 22 23 24

100M Orange 10M green 1000M Yellow

Amber
11 14
R9 R 10 R 11 *75/ F_4 *75/ F_4 75/ F_4 R 12 75/ F_4

MX4MX4+ MCT4 MX3MX3+ MCT3 MX2MX2+ MCT2 MX1MX1+ MCT1

TD4TD4+ TCT4 TD3TD3+ TCT3 TD2TD2+ TCT2 TD1TD1+ TCT1

12 11 10 9 8 7 6 5 4 3 2 1

TR A N_TRD0N T RA N_TRD0P TR A N_TRD1N T RA N_TRD1P TR A N_TRD2N T RA N_TRD2P TR A N_TRD3N T RA N_TRD3P C 42 C 41 C 43 C 40

TR D 0N 25 TRD0P 25 TR D 1N 25 TRD1P 25 TR D 2N 25 TRD2P 25 TR D 3N 25 TRD3P 25
4

*GS N5008 *. 01U/ 16V_4 *. 01U/ 16V_4 *. 01U/ 16V_4 *. 01U/ 16V_4

Green

13 10

R 306 2

1 330

10MBPS C 12 1000P /3KV

22

20

LA N-C10087-13P

R 420 0_4 31 D O CK _TRD0N

U8

1
R 421 0_4

2 2 2 2
R J 4 5_TRA N_TRD0N R J45_TRA N_TRD0P MCT1

31 D OCK _TRD0P

1
R 422 0_4

G2

For ME issue colayout
3

C N 28

31 D O CK _TRD1N

4

1
R 423 0_4

MCT2 R J 4 5_TRA N_TRD1N R J45_TRA N_TRD1P

9 10 11 12 13 14 15 16

2 1 G1

2 1

R I NG_1 TIP _1

R I NG_1 30 TIP _1 30

31 D OCK _TRD1P

1

TXTX+ CMT NC NC CT RXRX+
NS 0013

TDTD+ CT NC NC CT RDRD+

8 7 6 5 4 3 2 1

TR A N_TRD0N T RA N_TRD0P

TR A N_TRD1N T RA N_TRD1P

For RTL8100C R116 R117 R139 UN-POP POP UN-POP POP UN-POP UN-POP POP POP UN-POP UN-POP UN-POP UN-POP UN-POP UN-POP POP UN-POP UN-POP UN-POP UN-POP UN-POP UN-POP UN-POP UN-POP UN-POP UN-POP UN-POP UN-POP POP POP POP POP POP POP UN-POP POP POP POP POP

For RTL8110SB POP UN-POP POP UN-POP POP POP UN-POP UN-POP POP POP POP POP POP POP UN-POP POP POP POP POP POP POP POP POP POP POP POP POP UN-POP UN-POP UN-POP UN-POP UN-POP UN-POP POP UN-POP UN-POP UN-POP UN-POP
1 2 3

2
C 530 . 1U/ 10V _4

R127 R113 R114

3

C N 29

C 559 *1000P _2KV

C 560 *1000P _2KV

U36 RTL8110SBL(1G)--DEPOP RTL8100L(10,100) --POP

1

R J 11-CON

R115 R108 R124 C151 C138 C157 Q52 Q18 Q19 R412 R414 R416 R418 C531

G2

4

2 1 G1

2 1

R I NG_1 TIP _1

Reserved for EMI

3

* R J11-CON

+ 3V _LA N_D

C7

. 1U/ 16V_6

+ 3V _LA N_D

R4

100K_4

U2A N C 7W Z00-UHS

2

25 100M_LINK#

1 7 2
10MBPS R2 100K_4 100MBPS

8

C533 C40 C41 C42

+ 3V _LA N_D

25 1000M_LINK#

+ 3V _LA N_D U2B N C 7W Z00-UHS

4

C43 R9 R10 R420 R421 R422

+ 3V _LA N_D

5 3
25 10M_LINK#

6 4

8

R3

100K_4

+ 3V _LA N_D

R423 C530 U8

C399 . 1U/ 16V_6

5

U3 N C 7S Z08-UHS

U9 U44 C556 U3 C399

1 4 2 3
DOCK _10/ 100M_LINK# 31

1

+ 3V _LA N_D

C556 . 1U/ 16V_6

U44,U3,C399,C556 RTL8110SBL(1G)--DEPOP RTL8100L(10,100) --POP PROJECT : ED3

1
25 A CTLE D# A CT#

5

U 44 N C 7S Z08-UHS

4 2 3

DOCK _A CTLE D# 31

Quanta Computer Inc.
Size Doc ument Number

LAN Switch & Connector
Dat e: W ednes day , June 15, 2005
E

Rev A3A S heet 26 of 38

PDF created with pdfFactory trial version www.pdffactory.com

A

B

C

D

5

4

3

2

1

D

FAN CONTROL

+ 12VRUN

+ 5 VRUN

+ 12VRUN

D

R87 10K-0402 MAX6657_OV# 5,34

Q41 AO6402

8

1 2 5 6

6 5 2 1

+ 3 VRUN

32 VFAN

+ -

1

+5VFAN 10_6

3

3

2

3

3

R327

Q40 AO6402

R326

U19A LM358ADR

4

4

4

2
10K-0402 Q17 2N7002 32 F A NSIG C N18

+ 12VRUN F A N_PWR

R78 C99 .1U/25V_8 R88

3.9K/F

1

C428 3K 10U/10V_8

30 MIL

1 2 3
FAN

4 5

C

U19B LM358ADR

C

5 6

+ -

7

B

TOUCH PAD
C N7 +3VALW RP15 M Y0 M Y1 M Y2 MX0 CA3 220PX4 CA4 220PX4 M Y7 2 M Y6 4 M Y5 6 MX7 8 + 5VRUN L33 +5V_TP BK2125HS330_8 C236 .1U/10V_4 TOUC H _RIGHT

SW6

B

32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32

M Y15 M Y14 M Y13 M Y12 M Y11 M Y10 M Y9 M Y8 M Y7 M Y6 M Y5 MX7 MX6 MX5 MX4 M Y4 M Y3 MX3 MX2 MX1 MX0 M Y2 M Y1 M Y0

M Y15 M Y14 M Y13 M Y12 M Y11 M Y10 M Y9 M Y8 M Y7 M Y6 M Y5 MX7 MX6 MX5 MX4 M Y4 M Y3 MX3 MX2 MX1 MX0 M Y2 M Y1 M Y0

25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
6906-25

10 9 8 7 6
10KX8

1 2 3 4 5

M Y3 MX3 MX2 MX1

M Y4 MX4 MX5 MX6

1 2

1 3 5 7

2 4 6 8

1 3 5 7

3 4 5

R339 10K-0402

R338 10K-0402 C N6

TOUCH_PAD

MISAKI_TC004-PS11AT SW5 TOUCH_LEFT

CA6 RP17 M Y8 M Y9 M Y10 M Y11 +3VALW

220PX4

CA2

10 9 8 7 6
10KX8 RP16

1 2 3 4 5

M Y15 M Y14 M Y13 M Y12

M Y12 M Y13 M Y14 M Y15

1 3 5 7

2 4 6 8

1 3 5 7

2 4 6 8

220PX4 M Y3 MX3 MX2 MX1

32 TPDATA 32 TPCLK

R337 1 R336 1

2 2

0_4 0_4

TOUCH_LEFT CA5 M Y8 M Y9 M Y10 M Y11 220PX4 CA1

M Y4 MX4 MX6 MX5

10 9 8 7 6
10KX8

1 2 3 4 5

M Y6 M Y7 MX7 M Y5

1 3 5 7

2 4 6 8

1 3 5 7

220PX4 MX0 2 M Y2 4 M Y1 6 M Y0 8

TOUC H _RIGHT

1 2 3 4 5 6 7 8 9 10 11 12

1 2

3 4 5

MISAKI_TC004-PS11AT

2 4 6 8
CP1 8P4C-10P

1 3 5 7

A

2 4 6 8

A

CP2 8P4C-10P

1 3 5 7

PROJECT : ED2

Quanta Computer Inc.
Size D o cument Number

T/P, FAN, Switch, K/B
Date: W ednesday, June 15, 2005
1

Rev A3A Sheet 27 of 38

PDF created with pdfFactory trial version www.pdffactory.com

5

4

3

2

A

B

C

D

E

3V _MODEM

F o r Layout:

AC97 codec

L50

FB M-11-160808-121A20T

A V DD_CLK + C524 . 1U/ 16V _6 C 525 10U/ 10V_8

A MCV DD

Place decoupling caps near the power pins of M alibu device.

L49

FB M-11-160808-121A20T

+ 3_3V DC C502 A V DD_P IN25 L47 FB M-11-160808-121A20T 10U/ 10V _8 C 518 . 1U/ 16V_6 A G ND . 1U/ 16V_6 C 513 . 1U/ 16V_6 C 515 . 1U/ 16V_6 + C 507

C517 10U/ 10V_8

+

C 514 . 1U/ 16V _6

L48

FB M-11-160808-121A20T

+ 3_3V DD A GND C504 . 1U/ 16V _6

C505 . 1U/ 16V_6

A GND + + C527 10U/ 10V _8 C 522 . 1U/ 16V_6 C 526 10U/ 10V_8 + C 521 . 1U/ 16V_6

12

14

25

VDDCK

DVDD1

DVDD2

DVDD3

AVDD1

AVDD2

F o r Layout: Place these resistors close to SmartAMCZ device.

35

1

9

C 528 C523 10U/ 10V_8 . 1U/ 16V_6

VREF2 VREF1

18 19 23

RE F_FLT V C_S CA A GND V RE F_S CA

F o r Layout:

30 D IB _DA TA N 30 DIB _DA TAP

D IB _DA TA N DIB _DA TAP C 506 150P

R 389 R 390

0_6 0_6

47 48

DIBN VREF_FILT DIBP MICBIAS_F

Place near SmartAM CZ device
CN9

20 21 22 27 26 30 29 28 33 34 31 32

MICB IA S _F MICB IA S _C A UDV RE F2. 5V R442 C 516 10U/ 10V_8 MICB IA S _C + *7. 8K A MCV DD R400 2.2K

I N T_MIC

30 P W RCLK P

30 P W RCLK N

P W RCLK N C 508 150P R 395

R 394

0_6

4

MICBIAS_B PWRCLKN MIC_L MIC_R

I N T_MIC A GND A G ND

* 10K _NC

F o r Layout: Place crystal and associated circuitry very near SmartAMCZ Device.

12 A C_S DIN0 12 A C_B ITCLK 12 A C_S DOUT 12 A C _S Y NC 12 A C_RE S ET# R 398 + 5V RUN

R 396

33_4

8 13 7 10 11

SDI BCLK SDO SYNC RST#

U40 20551-27P2 SAM ART_AMC_HD
CD_R CD_GND CD_L PORT-C_R PORT-C_L

. 1U/ 10V_4 . 1U/ 10V_4 . 1U/ 10V_4

C509 C510 C512

A GND A GND A GND

R 285 *2. 2K _NC

R 284 *2. 2K _NC

P R_HP _R 31 P ORT_C_R_R A UDV RE F2. 5V P ORT_C_L_L R292 *2. 2K R 289 2.2K 7. 87K R443 P R_HP _L 31 A MCV DD
1

1

* 10K _NC

R401 *2. 7K _NC C 520 . 01U_4 R 403

BEEP

43 15 16

PORT-D_R PCBEEP PORT-D_L XTALIN PORT-B_L XTALOUT PORT-B_R PORT-A_L EAPD PORT-A_R SPDIF_OUT SENSEB VSSCK DVSS1 DVSS2 DVSS3 AVSS1 AVSS2 SENSEA

LINE IN/MIC IN
R288 1K -0603 L40 L41 R290 *1K -0603 P ORT_A_L 29 P ORT_A _R 29 R 293 R 291 A GND * 1K _NC * 1K _NC + 3V RUN R 444 A GND R 391 1. 5K /F + 3V RUN R 384 10K -0603 P ORT_B _SENSE C 546 A G ND 10K -0402 JA 6333L-3S 0-TR B K 1608LL121 *B K 1608LL121 L I NE INL L I N E INR C N 27 10U/ 10V_8 10U/ 10V_8 P ORT_A_L P ORT_A _R C 498 C 499 R463 0_0603

17 14M_AC97

X TLI * 0 _NC

4

P W RCLKP

R 393

0_6

3

1 2

PWRCLKP

MICBIAS_C

3

38 37 40 39 42 41

1 2 6 3 4 5

7

8

R 402 * 4. 7K _NC 29 S P DIF

45 44

S E NSEB S E NSEA

For AC-Link Mode: An external 14.318MHz clock source can be used to replace the crystal circuitry shown here. It should be connected to XTALIN (pin 15). The XTALOUT (pin 16) should be left floating. For HD Audio Mode: Do not populate crystal circuitry and leave XTALIN (pin 15) and XTALOUT (pin 16) floating.

2

5

46

6

VSUB

17

24

36

R 283

0_6

G r o u n d Tie
A GND R399 0_6 A GND

1

5

. 047U/ 10V_4 Q54

3

2

1

Docking side Phone jack-sense high active

2
R385 39K /F P ORT_C_S E NSE#

4
U 43 A H CT1G125DCH

2

2N7002 R455

P R_A UDP LUG 31

If use 20551-27P2 --->POP 39K and use driver =V535 If use 20551-27P4 --->POP 5.1K and use driver =newer than V535

1

Item133

100K _0402

BEEP
+ 3V RUN U 37 C550 74A HCT1G86GW 2 1

AC97 codec Power
+ 5V RUN + 3V RUN R392 * 0 _NC A MCV DD + 3V SUS R 386 0_8 3V _MODEM

5

. 1U/ 10V_4 + 3V RUN

. 1U/ 10V_4 C551

L46 A MC5V IN FB MH2016HM251NT

U38
3 IN

8 0 0 m A ( 30MIL)
OUT ADJ OUT 4 2
C 486 10U/ 10V_8 R380 C 489 . 01U/ 16V_4 C 492 . 1U/ 10V_4

21 PCMSPK 13 P CS PK

1 2

4 3 5 1 2
U 29 74A HCT1G08GW

2 4

1
C 478 BEEP . 47U/ 10V_6

C479 . 1U/ 10V _4

P CB EEP

29, 32 S Y S S P K OFF#

3

R 381 3 V A UDA DJ A GND 205/ F

1

C 480 . 1U/ 10V_4

A IC 1117

PROJECT : ED3

124/ F A GND A G ND A G ND Size

Quanta Computer Inc.
Doc ument Number

AC97 CODEC + MODEM
Dat e: W ednes day , June 15, 2005
E

Rev A3A S heet 28 of 38

PDF created with pdfFactory trial version www.pdffactory.com

A

B

C

D

1

2

3

4

5

6

7

8

AVD D

R 383

GAIN

SPKR MODE

HP MODE 3 0

* 1 K_NC + 5 VRUN G A IN R 379 0_8 C395 R 382 1K-0603 C 496 . 1 U/10V_4 C 485 . 1 U/10V_4 + 5 VR UN C500 AVD D C 490 1 U/10V_6 AVD D C477

FOR EMI SOLUTION
R 294 . 1 U/10V_4 C 476 . 1 U/10V_4 C 394 . 1 U/10V_4 . 0 1U/16V_4 . 1 U/10V_4
A

0 _6

A

0 1

10.5

9

R428 A GND

25

15 8

U3 9

10 7

A GND

A GND

A GND

10K-0402

A GND

VDD

HPVDD C1P

NC NC INL INR GAIN GND

C1N CPVDD

1 27
C 482 A OUTL C 483 AO UTR 4 . 7 U/10V 4 . 7 U/10V

HPS HPL HPR

20 14 13 4 5 17 18 6 3 16 19

HP S SPKL SPKR I NSPKL+ IN SPKLIN SPKRIN SPKR+ Q53

3

Headphone out / SPDIF OUT
2
2 N7002 + 5 VR UN H PS#

2 28
+ 5 VR UN U3 6 G A IN

2
32 AMP_MUTE# 2 8,32 S YSSPKOFF#

1

AVD D

. 1 U/10V_4 1

5

23 4
M UTE

GND

3

21

VBIAS

VSS

2

/SHDN

CPVSS

22

CPGND

PVDDL PGNDL PVDDR PGNDR

26

9

11

7 4 AHCT1G08GW

C494 1 U/10V_6 C 493 C N26 AGND 1 U/ 10V_6 28 S P DIF SPKR A GND A GND A GND SPKL R 466 3 3_4 C 390 1 + R 465 3 3_4 S P D IF C 475 1 + Drive IC

B

12

MAX9755ETI+

C 484 . 1 U/10V_4

C 487 1 0 U/10V_8

C 497 . 1 U/10V_4

C 481 1 0 U/10V_8

1

C 552

24

OUTL+ OUTLOUTROUTR+

C 392

. 1 U/10V_4

2
2 2 0U_4V_L L38 L39 BK1608LL121 BK1608LL121 SPKR1 SPKL1

2

2 2 0U_4V_L C 393 470P_4 C 391 470P_4

1 3 2 4 5

D LT11M3_SPDIF/O SPDIF-DLT11MX-10P-V

R 467 * 0 _ NC

R 468 * 0 _ NC A GND AGND AGND

+ 5 VR UN

R 445 10K-0402 *0 *0 28 PORT_A_L
C

R 429 R 430 R 431 3K

A OUTL AO UTR C535 C536 1 0 U/10V_8 1 0 U/10V_8 H PS#

New type Phone jack low active

SPEAKER CON.
C N2
C

28 PORT_A_R

R 432

3K R 433 10K R434 10K I NSPKL+ IN SPKLL 43 L 42 0 _6 0 _6 INS PKL+N INS PKL-N

3D_STEREO_VDD A GND R 435 A GND U4 2 P O RT_A_L_IN P O R T_A_R_IN A OUTL AO UTR R 324 * 0 _NC R 325 * 0 _ NC

3802-02

IOPJ2-7 for NS97551 have internally weak pull up

10K-0402

+ 1 2 VRUN + 5 VRUN

14 13 12 11 10 9 8

3D_STEREO_VDD

LIN RIN LOUT ROUT MODE GND V+
NJ M2199

FIL1 FIL2 FIL3 VOL2 VOL1 VREFIN VREF

1 2 3 4 0_4 5 10K 6 7

R 436 R 437

. 0 3 3U .01U .47U .33U 1U

C 537 C 538 C 539 C 540 C 541

A GND A GND IN SPKR+ IN SPKRL51 L52 0 _6 0 _6 INS PKR+N INS P KR-N

C N11

Q55 32 3 D _ON#

2
C 543 1 0 U/10V_8 2 N7002 R 439 * 0 _8_NC C 544 A GND A GND

3

1 0 U/10V_8

C 542

R 405 * 0 _NC

R 404 * 0 _ NC

3802-02

When 3D_ON# Keep low then 3D active
D

1

R 451

0_8 .1U

C 545 1 0 U/10V_8

A GND

AGND

A GND

A GND

A GND

A GND
D

PROJECT : ED2

Quanta Computer Inc.
Size D oc um ent Num ber

Audio Amplifier & Jack
D ate:
1 2 3 4 5 6 7

W e d n es day, June 15, 2005

Sheet

PDF created with pdfFactory trial version www.pdffactory.com

LED

6 7 8

B

10 9

AGND

1 2

1 2

R ev A3 A 29
8

of

38

5

4

3

2

1

Revision History REV
00

Description
Initial Release
27mmx27mm form factor.

Date
F ebruary 14, 2002

REV:B MODIFY FOR USE NEW MODEM MODULE
MTP58 1

Vdd MC978 0.1uF

MTP59 01 July 5, 2002 24

1 DGND_LSD

1 1

MTP36 MTP35

1 1

MTP37 MTP38

1

MTP39 RING_2 MFB902 MMZ1608D301B MBR904 MRV902 MC906 470pF RING_1

RING_1 26 MTP41

1

DVdd

02
D

6 pins J1 connector-T /R traces for specific uses-100V C902/C904 add J1B - remove T903

September 24, 2002 October 9, 2002

RAC1 TAC1

21 20

RAC1 TAC1

MR902 MR904

1M_8R AC1/RING 1M_8T AC1/TIP

MC902 MC904

0.033uF/100V

AC

03

8 22

D

NC1 NC2

0.033uF/100V C A

MMBD3004S

MJ2 1 2

04

Change J1 & J1B. Change R938 size. Add TP60 to TP71. Removed J1B. Change size for C978, C984, R902, R904, R906, R908, R910 and R978. Changed BR904 and BR906 to different manufacture.

November 12, 2002 25

NC3

RAC2

19

C

A

05

November 26, 2002 29 PADDLE TAC2 18

KU10S31N

AGND_LSD MC908 470pF

G ND

*F I-S2P-HF (JAE)_NC

06 07

Corrected error in Q904 PCB footprint. Added DIB data transformer footprint, added MC966, deleted ring impedance circuit. Added the letter "M" prefix to all reference designators. Changed value for MC966 from 3.3nF to 10nF, 100V, +/-20%, Y5V. By default, MC966 will be populated. Also, changed CX20493 revision from 11 to 21.

January 3, 2003 AGND_LSD MTP34 November 06, 2003 TRDC 12 TRDC 1 MR906 6.8M MTP40 1 MC918 MTP33 0.1uF EIC MTP28 1 1 1 RXI C926 must be placed near pin 26 (CLK). CLK2 MC926 BR908_CC MFB906 MMZ1608D301B AC1 MTP30 1 MC970 A1 A2 AC2 0.1uF MC930 2.2uF MC928 0.1uF 6 MBR908 BAV99S MTP27 1 MTP72 MTP60 EIF 28 DIB_DATAP 1 MC922 10pF DIB_P1 MR922 0_4 1 DIB_P2 27 TXO DIB_P TXF 13 TXF 14 TXO MQ906 PMBTA42 1 MTP64 1 1 MTP65 MR938 110 AGND_LSD Vc_LSD 2 3 *MID82157(omit) Vref_LSD C944, C974, and C976 must be placed near pins 3 (Vc) and 4 (VRef). DGND_LSD AGND_LSD MTP49 MR928 27 16 E IF C970 must be placed near pins 7 (PWR+) and 6 (AGnd). C928, C930 must be placed near pins 2 (AVdd) and 6 (AGnd). AGnd 17 EIO VZ 10 VZ MR908 348K R908 must be placed near pin 10 (VZ). MC910 0.047uF/100V BRIDGE_CC 2 AVdd CLK 10P_4 PWR+ Vdd 26 CLK GPIO1 RBias PWR+ 1 1 5 RBias MR954 AGND_LSD MTP69 59.0K 1 MTP68 1 9 R XI MR910 237K R910 must be placed near pin 9 (RXI). 11 E IC MC958 15nF AGND_LSD MTP70 AGND_LSD RXI-1 1 MTP71 1 AC September 24, 2003 MU902 MBR906 MMBD3004S TIP_2

MFB904 MMZ1608D301B

TIP_1

08

1

MTP42

MC966 10nF/100V C906 and C908 must be Y3 type Capacitors for Nordic Countries only

TIP_1 26

MTP29 MTP52 1
C

MR932 15K

C

MTP26 1 28 P WRCLKN

7

MTP32

MTP22 1 28 PWRCLKP 1 2 3 4 5 6 7 8 P WRCLKN 1 MT9024 BR908_AC1 MC962 47pF PCLK

C1 C2 + DIB_DAT AN

MJ1 1 2 3 4 5 6 7 8

PWRCLKP MTP23 1

2 3 MID82154

EIO AGND_LSD

MQ902 PMBTA42 1 MTP67 MTP31 1 MQ904 SB29003 1 MTP66

MTP24 1 DIB_DATAP

*HEADER8

MJ3
B

1 2 3 4 5 6 7 8

1 2 3 4 5 6 7 8

MC924

10pF

DIB_N1 MR924 MTP73 1

0_4

DIB_N2 MTP61 1

28

DIB_N VRef DC_GND DGnd Vc

MTP25 1 G ND 28 DIB_DAT AN 1 MT9224

15 23

B

3

*HEADER8 (omit)

4

20493-58

MTP62 1

MTP63 1 AGND_LSD

Depending of the design target and DIB length, DIB components can be: -C922/C924 10pF -C922/C924 47pF (Validation in progress) MC974 *0.001uF (omit) C922, C924, C906, and C908, must be Y3 type Capacitors in order to comply with Nordic Countries deviations of IEC60950 2nd and 3rd ed. Y3 type capacitors must also be certified for a 2.5KV impulse test. This must be checked in vendors' specifications (see AVL). Circuit traces for C922 and C924 should be less than 2 inches. MC944 0.1uF

MC940 1uF

MC976 .001uF_4

C940 is X5R ceramic. AGND_LSD

A

A

PROJECT : ED2

Quanta Computer Inc.
Size Date:
5 4 3 2

Document Number

MODEM D AA
Wednesday, June 15, 2005
1

R ev A3A Sheet 30 of 38

PDF created with pdfFactory trial version www.pdffactory.com

1

2

3

4

5

6

7

8

D4

2
+ 5V RUN +3VSUS PE S LCT B US Y A CK # A FD# E R ROR# S LIN# I N IT# P D3 P D2 P D1 P D0 P D6 P D7 P D5 P D4 S TRB# R 25 RN2 4

1
S W 1010C

Z 1401

2K / F

+ 3V RUN C 55 C 66 C 67 C 68 C 53 . 1U/ 10V_4 . 1U/ 10V _4 . 1U/ 10V_4 . 1U/ 10V _4 . 1U/ 10V_4

2
RN4 4

2
RN3 4

3 4P 2R-S -2.2K 1 3 4P 2R-S -2.2K 1 3 4P 2R-S -2.2K 1 3 4P 2R-S -2.2K 1 3 4P 2R-S -2.2K 1 3 4P 2R-S -2.2K 1 3 4P 2R-S -2.2K 1 3 4P 2R-S -2.2K 1

2
RN8 4

11 26 45 54

U12
55 56 57 58 53 51 50 49 48 47 46 44 42 41 59 60 61 40 5 64 62 1 63 2 3 4 37 38 39
- D CD1 - DS R1 R X D1 -RTS 1 T XD1 -CTS 1 - DTR1 - R I1 S LCT PE B US Y A CK # P D7 P D6 P D5 P D4 P D3 P D2 P D1 P D0 S LIN# I N IT# E R ROR# A FD# S TRB#

7

A

2
RN6 4

A

VCC1 VCC2 VCC3 VCC4

VTR

17 14M_S UP E RIO 12, 32 LA D0/ FW H0 12, 32 LA D1/ FW H1 12, 32 LA D2/ FW H2 12, 32 LA D3/ FW H3 12, 32 LFRA ME #/ FWH4 12 LP C_DRQ0# 8, 12, 13, 20,32 P LTRS T# 13, 21 LP CP D# 17 P CLK _LPC 12, 13, 21, 24,32 S E RIRQ 12, 21, 24,25 PME# 12, 24, 25,32 C L K RUN# 13, 32 KBSMI# + 3V RUN

9 10 12 13 14 15 16 17 18 20 21 6 19 34 2
R 43 10K -0402

1

33 1
R 40 *10K -0402

SLCT PE BUSY ACK~ CLOCKI PD7 LAD0 PD6 LAD1 PD5 LAD2 PD4 LAD3 PD3 LFRAME~ PD2 LDRQ~ PD1 PCI_RESET~ PD0 LPCPD~ SLCTIN~ PCI_CLK S TQFP 64-9X 9-4 INIT~ SER_IRQ ERROR~ IO_PME~ ALF~ CLKRUN~ STROBE~ GP12/IO_SMI~ GP23/FDC_PP GP11/SYSOPT

2
RN7 4

FIR
+ 3V RUN

2
RN5 4

LPC47N217

RN1 4

1

2 2

1/2W
+ C 430 4. 7U/ 10V_8 R105 2. 2_1210 U 32 C429 . 1U/ 16V_6 F I R V CC I R _TX_R

2

10 9 4 5

LEDA TXD MD0 MD1 RXD FIR_SEL VCC GND AGND NC S-GND 11

I RTX2 U5 -RTS 1 - DTR1 T XD1 - DS R1 R X D1 -CTS 1 - D CD1 - R I1 + 5V RUN R7 10K -0402 R 424 *4. 75K / F_6 *100K /F

14 13 12 19 18 17 16 15 23 22 21 20 28 24 1 2

T1I T2I T3I RIO R2O R3O R4O R5O

T1O T2O T3O R1I R2I R3I R4I R5I

9 10 11 4 5 6 7 8

MRTS 1# MDTR1# MTXD1 MDS R1# MRXD1 MCTS 1# M DCD1# MRI1#

+ 3V RUN I R RX2 I R MODE / IRRX3 + 3V RUN

R 425

I R _ RX_R IR_S E L_R R 426 *100K /F + 3V RUN

8 3 1 7 2

P CLK _LPC

GND1 GND2 GND3 GND4

B

8 22 43 52

. 33U

C9

C1+ C1C2+ C2-

VCC V+ VGND
MA X3243

2

C 548 *10P _4

SYSOPT Strap : 1--2 (High) - 0x04E 2--3 (Low) - 0x02E

+ 5V RUN C 175

1

R 452 *22_4

32 35 36 23 24 25 27 28 29 30 31

GP10 GP13/IRQIN1 GP14/IRQIN2 GP40 GP41 GP42 GP43 GP44 GP45 GP46 GP47

DCD1~ DSR1~ RXD1 RTS1~ TXD1 CTS1~ DTR1~ RI1~ IRRX2 IRTX2 IRMODE/IRRX3

2

I R RX2 I RTX2 I R MODE / IRRX3

FORCEON FORCEOFF# INVAILD# R2OUTB 26 27 3 25

6
+ C 170

HS DL-3602-007

0. 047U_4

C 20

. 33U . 33U . 33U

C 14 C 19 C 10

6. 8U/ 6. 3V V _1206

. 47U/ 10V_6

B

+ 3V RUN

Reserve for docking no pop Co-layout under switch
R 470 10K -0402 C 24 4. 7U/ 10V_8 . 1U/ 10V_4

3

R 406 INT_V GA _RE D Q59 2N7002 R 407 INT_V GA _GRN

*0_6 + 5V RUN *0_6 L5

C 25

2

1

P R_V CC

PORT REPLICATOR Connector
C N 16

P R_INS E RT# 2

B LM18P G181SN1

1.5A
R 408 *0_6

1

102

INT_V GA _B LU 32 K P CLK 32 K P DA TA 32 MSCLK U 13 NC7S B 3157

+3VSUS

6
8 INT_V GA _RE D INT_V GA _RE D

SEL COM GND GND

VCC IN_B0 IN_B1

5 3 1
D C R T_R1 V GA _RED

32 MS DATA + 3V RUN V GA _RE D 19 P R_V CC MDS R1# MRTS 1# MCTS 1# MRI1# S TRB# P D0 V GA _GRN + 3V RUN V GA _GRN 19 P D1 P D2 P D3 P D4 P D5 P D6 P D7 V GA _B LU 19 28 P R_A UDP LUG P R_A UDP LUG

4 2

C

2
INT_V GA _GRN

IN_B1
8 INT_V GA _GRN

1 3 5

D C RT_G1

4 6

COM SEL
U 15 U 16

IN_B0 VCC
NC7S B 3157

NC7S B 3157

6
8 INT_V GA _BLU INT_V GA _B LU

SEL COM GND

VCC IN_B0 IN_B1

5 3 1
D CRT_B 1 V GA _BLU

+ 3V RUN

4 2

13 US B P 213 US B P2+

R 45 150/ F_4

R 42 150/ F_4

R 38 150/ F_4

19 P R_V S Y NC 19 P R _DDCCLK 19 P R _DDCDA T

P R_US B P2P R_US BP2+ CML3 DLW 21HN900S Q2L US B P W R2 P R_V S Y NC

1

1

4 1

3 2

Docking side need to change BOM to DEPOP 150ohm
12, 19,32 M_S EN# R 47 26 DOCK _10/ 100M_LINK# + 5V RUN U6 + 3V RUN 26 DOCK _A CTLE D# DOCK _10/ 100M_LINK# R 51 DOCK _A CTLE D# 470_4 470_4 + 3V RUN

R 14
D

4 3 2 1

EN# VCC VCC GND
G528

OC# VOUT VOUT VOUT

5 6 7 8
C 22 . 01U/ 16V_4

US B OC2# 13 US B P W R2 C 21 150U/ 6. 3V_7

100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51

50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

VA

R 13 10K -0402

VA

C 13 C 17

4. 7U/ 25V -1210 . 1U/ 10V_4 . 1U/ 10V_4 . 1U/ 10V_4 . 1U/ 10V_4
C

D O CK _IN# M DCD1# MRXD1 MTXD1 MDTR1# A FD# E R ROR# I N IT# S LIN#

P R_INS E RT#

P R_INS E RT# 13, 32

C 16 C 18 C 15

P R_HP _OUTL C 26 P R_HP _OUTR C 31

220P_4 220P_4 10P_4

A CK # B US Y S LCT PE

P R_A UDP LUG C 38

P R_HP _OUTL P R_HP _OUTR

R 24 R 26

0_6 0_6

P R_HP _L 28 P R_HP _R 28

D CRT_B 1 D C RT_G1 D C R T_R1

C 54 C 57 C 65 C 70 C 69 C1 C3 C4 C6

*10P _4 *10P _4 *10P _4 1000P_4 1000P_4 47P _4 47P _4 47P _4 47P _4

1

US B P W R2 P R _ HS Y NC D CRT_B 1 D C RT_G1 D C R T_R1

DOCK _10/ 100M_LINK# P R _HS Y NC 19 DOCK _A CTLE D# K P CLK K P DATA

2

2

2

LA NP HY RX+ L A NP HY RXLA NP HY TX+ LA NP HY TX-

D OCK _TRD1P 26 D O C K _TRD1N 26 D OCK _TRD0P 26 D O C K _TRD0N 26

MSCLK MS DATA

D

1K -0402

S OIC8-6-1_27

101

PROJECT : ED3

Quanta Computer Inc.
Size Doc ument Number

DOCKING & SIO & FIR
Dat e: W ednes day , June 15, 2005 S heet
8

Rev A3A 31 of 38

PDF created with pdfFactory trial version www.pdffactory.com

1

2

3

4

5

6

7

5

4

3

2

1

RE F3V

V C CRTC

+3VALW R5 1K -0603 + 3V A LW_551

1

Q15 * 2N7002_NC

3V H_551 37 RE FP +3VALW + 3V A LW_551 10U/ 10V_8 . 1U/ 10V _4 . 1U/ 10V_4 . 1U/ 10V_4 . 1U/ 10V_4 NB S W ON#

2 1
C 48 C 87 C 49 C 47 C 58 Q4 P DTA 124EU Q3 P DTA 124EU

3

2

1

2
551_AVCC D3 BAS316 S US B#

BT2#

3

R 30 R C0805
D

3

1

0_8

L14 FB M2125HM330

C 72 . 1U/ 10V _4 + 3V RUN

34 45 123 136 157 166

161

C 77 . 1U/ 10V_4

16

95

+3VALW

A C IN

2

1
R8 100K _4 H OLD#

U 17

AVCC

VCC1 VCC2 VCC3 VCC4 VCC5 VCC6

VBAT

VDD

+3VALW

R 67 470K_4

D8 2 B A S 316

1

12, 13, 21,24,31 S E RIRQ 12 LP C_DRQ1# 12, 31 LFRA ME #/ FW H4 12, 31 LA D0/ FW H0 12, 31 LA D1/ FW H1 12, 31 LA D2/ FW H2 12, 31 LA D3/ FW H3 17 P CLK _551 13, 31 K B S MI# 13 S W I# 13 S CI# KBSMI# S W I# S CI#

R 654

0

2
D9

1
B A S 316

551_K BSMI# 551_S W I# 551_S CI#

D 13

BAS316

2
D 12

1
BAS316

31 5 6 71 72 73 74 77 78 79 80 49 50 51 52 53 56 57 58 59 60 61 64 65 66 67 68 105 106 107 108 109 110 111 114 115 116 117 118 119

IOPD3/ECSCI GA20/IOPB5 KBRST/IOPB6 KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7 KBSOUT0 KBSOUT1 KBSOUT2 KBSOUT3 KBSOUT4 KBSOUT5 KBSOUT6 KBSOUT7 KBSOUT8 KBSOUT9 KBSOUT10 KBSOUT11 KBSOUT12 KBSOUT13 KBSOUT14 KBSOUT15 TINT TCK TDO TDI TMS PSCLK1/IOPF0 PSDAT1/IOPF1 PSCLK2/IOPF2 PSDAT2/IOPF3 PSCLK3/IOPF4 PSDAT3/IOPF5 PSCLK4/IOPF6 PSDAT4/IOPF7

DA output

DA0 DA1 DA2 DA3 IOPA0/PWM0 IOPA1/PWM1 IOPA2/PWM2 IOPA3/PWM3 IOPA4/PWM4 IOPA5/PWM5 IOPA6/PWM6 IOPA7/PWM7 IOPB0/URXD IOPB1/UTXD IOPB2/USCLK IOPB3/SCL1 IOPB4/SDA1 IOPB7/RING/PFAIL IOPC0 IOPC1/SCL2 IOPC2/SDA2 IOPC3/TA1 IOPC4/TB1/EXWINT22 IOPC5/TA2 IOPC6/TB2/EXWINT23 IOPC7/CLKOUT IOPD0/RI1/EXWINT20 IOPD1/RI2/EXWINT21 IOPD2/EXWINT24

T98

Q8

3

2

1

99 100 101 102 32 33 36 37 38 39 40 43 153 154 162 163 164 165 168 169 170 171 172 175 176 1 26 29 30 2 44 24 25 124 125 126 127 128 131 132 133 138 139 140 141 144 145 146 147 150 151 152 41 42 54 55 143 142 135 134 130 129 121 120 113 112 104 103 48
A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18

CC-S E T 37 CV -S ET 37 B R IGHT 18

3

7 8 9 15 14 13 10 18 19 22 23

SERIRQ LDRQ LFRAME LAD0 LAD1 LAD2 LAD3 LCLK LREST SMI PWUREQ

5

Host interface

AD Input

AD0 AD1 AD2 AD3 IOPE0AD4 IOPE1/AD5 IOPE2/AD6 IOPE3/AD7 DP/AD8 DN/AD9

81 82 83 84 87 88 89 90 93 94

TEMP_MBAT T103 T101 T102

TEMP_MBAT 37

C 400 . 1U/ 16V _6 + 3V RUN

RF_S W # 24 B T_SW# 24 S US C# 13 T100 T99

1 4 2
U 30 N C 7S Z08-UHS HW P G 34, 35,36 MA X6657_AL

3

C 88 . 1U/ 10V_4

C 50 . 1U/ 10V_4

Should have a 0.1uF capacitor close to every GND-VCC pair + one larger cap on the supply.

2

BT1#

D

2

1
D1 BAS316 Q1 P DTA 124EU

R 39 10K -0402

2
S CROLE D# 24 V FA N 27 S Y S S P K OFF# 28, 29 A MP _MUTE# 29 BT1# 24 BT2# 24 M_S EN# 12, 19, 31 2N7002

12 GA TE A20 P CLK _551 12 R C I N# 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7 MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY 10 MY 11 MY 12 MY 13 MY 14 MY 15

GA TEA20 R C I N# MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7 MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY 10 MY 11 MY 12 MY 13 MY 14 MY 15

2
D7

1
BAS316

551_GA TEA21 5 5 1_RCIN#

MA X6657_AL# 5

2
D6

1
BAS316

1

PWM or PORTA

R 49 *10_4

BT1# BT2# R 456

0

+3VALW

C N 14

1

+3VALW MBCLK MB DATA R 35 R 36 4. 7K_4 4. 7K_4

1 2

C

P R_INS E RT# 13, 31 MBCLK MB DATA R 37 0_4 P W R_B LUE# 24 MB CLK 5,37 MB DATA 5,37 P LTRS T# 8, 12, 13, 20,31 R E FON 37 L ID551# 18

TX_551

Key matrix scan PORTB

2

C 78 *10P _4

1 25 36 4
*551_DE B UG_NC

C

CIRON D 5

1

2 BAS316

PORTC

DNB S W ON# 13

U 10 E NV 0 E NV 1 B A DDR0 B A DDR1 T RIS SHBM A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 LA N_PME# 25 C S# RD# W R#

E C_FP B A CK# MA X6657_AL R 41 H OLD# A C IN 551_PME# NB S W ON# S US B# 551_LP CP D# C L K RUN# E NV 0 E NV 1 B A DDR0 B A DDR1 T RIS SHBM A6 A7 D0 D1 D2 D3 D4 D5 D6 D7 RD# W R# IOS E L# T88

F A NS IG 27 E C_FP B A CK# 18 0_4 I CH_P W ROK 13

P o we r L ED controll

PORTD-1

A C IN 37

PORTE JTAG debug port

IOPE4/SWIN IOPE5/EXWINT40 IOPE6/LPCPD/EXWIN45 IOPE7/CLKRUN/EXWINT46 IOPH0/A0/ENV0 IOPH1/A1/ENV1 IOPH2/A2/BADDR0 IOPH3/A3/BADDR1 IOPH4/A4/TRIS IOPH5/A5/SHBM IOPH6/A6 IOPH7/A7 IOPI0/D0 IOPI1/D1 IOPI2/D2 IOPI3/D3 IOPI4/D4 IOPI5/D5 IOPI6/D6 IOPI7/D7 IOPJ0/RD IOPJ1/WR0 SELIO

NB S W ON# 24 S US B# 13

+3VALW R 70 10K -0402 +3VALW R 74 4. 7K_4

+3V_S5

C L K RUN# 12, 24, 25,31

PS/2 to Port Replicator
31 MSCLK 31 MSDATA 31 K P CLK 31 K P DATA 27 TP CLK 27 TP DATA 24 CA P S LE D# 24 N UMLE D# MSCLK MS DATA K P CLK K P DATA TP CLK TP DA TA

Q16 P DTC144E U

12 11 10 9 8 7 6 5 27 26 23 25 4 28 29 3 2 30 22 24 31

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 CE# OE# WE#
* P LCC32

D0 D1 D2 D3 D4 D5 D6 D7 VPP

13 14 15 17 18 19 20 21 1

D0 D1 D2 D3 D4 D5 D6 D7

A18

2

+3VALW

VCC

32

PORTH PS2 interface

3

1

GND

16

B

+ 5V RUN R 28 R 64 R 63 R 61 R 59 R 54 R 48 10K -0402 10K -0402 10K -0402 10K -0402 10K -0402 10K -0402 MSCLK MS DATA K P CLK K P DATA TP CLK TP DA TA Y1 R 29 C 56 12P _4 32. 768K HZ C 39 12P _4 20M_4

551_32KX1 551_32KX2

158 160

32KX1/32KCLKOUT 32KX2

PORTI

FLASH 8Mbit (1M Byte),NO PLCC TYPE
AM D :Pin 10 is RESET# ; Pin12 is RY/BY# SST :Pin10,12 are NC
U7

CO-layout with U7

B

121K / F_4 PORTJ-1

IOSEL# is NC now

Battery LED BLUE and AMBER

21 GRS T#_7411 29 3 D_ON# 24 P W R_A MBER# 24 B A TLE D_B LUE# 24 B A TLE D_AMBER# 24 R F_E N 24 B T_P W RON# 13 RS MRST# T87 33 V RON 16, 34,36 MA INON 16, 34, 35,36 S US ON 34 S 5_ON C S#

62 63 69 70 75 76 148 149 155 156 3 4 27 28 173 174 47
U 11 MBCLK MB DATA +3VALW

IOPJ2/BST0 IOPJ3/BST1 IOPJ4/BST2 IOPJ5/PFS IOPJ6/PLI IOPJ7/BRKL_RSTO IOPM0/D8 IOPM1/D9 IOPM2/D10 IOPM3/D11 IOPM4/D12 IOPM5/D13 IOPM6/D14 IOPM7/D15 SEL0 SEL1 CLK

PORTD-2 PORTJ-2

IOPD4 IOPD5 IOPD6 IOPD7 IOPK0/A8 IOPK1/A9 IOPK2/A10 IOPK3/A11 IOPK4/A12 IOPK5/A13/BE0 IOPK6/A14/BE1 IOPK7/A15/CBRD IOPL0/A16 IOPL1/A17 IOPL2/A18 IOPL3/A19 IOPL4/WR1

S US LE D_B LUE# 19 S US LE D_A MBER# 19 D / C# 37 B L/ C# 37

PORTK PORTM

2

AGND

GND1 GND2 GND3 GND4 GND5 GND6 GND7

C S# RD# W R#

22 24 9

6 5 7

SCL SDA WP

17 35 46 122 159 167 137

96

A

VCC GND

8 4

11 12 20 21 85 86 91 92 97 98

A0 A1 A2

1 2 3

NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10

CE# OE# WE#
S S T39V F080

GND GND

23 39

A J975510F06

C 81 1U/ 10V _6 E NV 1 B A DDR0 B A DDR1 SHBM R 31 R 32 R 33 R 34 10K -0402 *10K _4_NC *10K _4_NC 10K -0402

+3VALW

*NM24C08

1.AM D-29LV081B require MAX 500nS Tready for it's hardware reset.And M AX6326_UR29 has >100mS reset timing.So we can tie it's reset# pin to +3VALW directly. 2.SIO has internal 20 mS delay of VCC1_PWROK

2

PORTL

21 20 19 18 17 16 15 14 8 7 36 6 5 4 3 2 1 40 13 37

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19

D0 D1 D2 D3 D4 D5 D6 D7 RESET#/NC RY/BY#/NC NC1 NC2 NC3 VCC VCC

25 26 27 28 32 33 34 35 10 12 29 38 11 31 30

D0 D1 D2 D3 D4 D5 D6 D7 V CC1_P W ROK

+3VALW

R 21 10K -0402

1
T86 +3VALW *P A D

C 23 . 1U/ 10V _4

1

C 28 . 1U/ 10V _4

1

C 29 . 047U/ 10V_4

2

A

BADDR1-0 0 0 0 1 1 0 1 1

I/O Address Index Data 2E 2F 4E 4F (HCFGBAH, HCFGBAL)(HCFGBAH, HCFGBAL)+1 Reserved Size

PROJECT : ED2

Quanta Computer Inc.
Doc ument Number

KBC 87551 & Flash
Dat e: W ednes day , June 15, 2005
1

Rev A3A S heet 32 of 38

PDF created with pdfFactory trial version www.pdffactory.com

5

4

3

2

5

4

3

2

1

+ 3V RUN

value provied 2.67% offset; old value was for old 4.62% offset.
2
PR2

V HCORE + 5V RUN V IN8 P C22 10U/ 25V -1210 P C23 10U/ 25V -1210 V IN PL1 HI0805R800R-00

2

PR1
D

1
42. 2K/F

CMP RF

30K

1

3

BG waveforms improved. may delete from future P R5 revision.

2

P C16

P C15

1 6 0mil
. 1U

D

2

332/ F

4. 7U/ 10V_8 PQ7 A OD404 P D2 RB 551 B S T1_V CORE PQ6 * A OD404_NC

P C25

P C20 . 1U-0805

P C24 2200P

P C26 . 1U-0805

PL2 HI0805R800R-00

1

4

+ 5V RUN

4

. 1U-0805

2 3
DP RS LP V R

3

2

1

3

1

2
6, 13, 17 S TP _CP U#

2 1
PQ3 CH2507S PQ2 CH2507S

PR8 10

330P PR6 V HCORE 2mR-7520 P R115

2

P C4

1

P R24 3. 3-0805 P C14 1U-0805

3

PQ1 CH2507S

C ORE

1

1
P C21 10U/ 25V -1210

1

0. 68uH(E TQP 6FOR6BF) PL9

1

P C1 4. 7U/ 10V_8

*100K _NC

1 1P 4 4
PQ5 A OD414 PQ4 A OD414

2 2P

17

28

P U1

3

CORE

V5_1

BST

VCCA VID5 VID4 VID3 VID2 VID1 VID0 PWRGD

TG DRN BG PGND

4. 7U/ 10V_8

1

21
+ 3V RUN 6 C P U_V ID5 P R12 2.2K IMV P _P W RGD PC8 * . 1U_NC 6 C P U_V ID4 6 C P U_V ID3 6 C P U_V ID2 6 C P U_V ID1 6 C P U_V ID0 C P U_V ID5 C P U_V ID4 C P U_V ID3 C P U_V ID2 C P U_V ID1 C P U_V ID0

2 1 27 26

D H _V CORE

1

P C17 PD3 SSM14 P C11 + 470U/ 2V P C107 + 470U/ 2V P C18 . 01U

3

3

9 10 11 12 13 14

LX_V CORE

1

1

1 2

P D1 SSM14

D L_V CORE

CL

24

CL

P R9

2

1 1. 54K/F

C

8,13 IMV P _P W RGD

IMV P _P W RGD 16 PBOOT

CMP 6 25
V DP R 13 DP RS LP VR DP RS LP V R

23

CMP

P R4

2

1 750/ F

V H_R1 V HCORE PR3 0_6

2

S C451

2

P R26 0_6

9mOhm 7343 SP

9mOhm 7343 SP

C

PBOOT ENPAD VDPR DPRSL CLK_ENABLE# HYS GND SS DAC 18
DA C P R10

32 V RON

CLRF

22

C L RF

P R7

2

1 1. 54K /F

V H_L1

2

1

5 4 7

CMPRF

20

CMP RF

P R11 2

1 1. 82K /F

Set up for constant-ripple mode. Was constantfrequency mode

17 CLK _E N# HY S

8
S S _C

2
P C2 1000P

1

511/ F

P R25 *61. 9K / F_NC

P R21 *30. 1K / F_NC

1

+ 3V RUN

P R13

100K

15
PC9 . 01U

9mOhm 7343 SP

+

1

1

P C10 *470U/ 2V -7343_NC

P C19 . 01U

P R20 22. 1K/F

2

2

PBOOT

2

9/3 for core funtion
1 1
P R22 CL P R139 20K /F 0_6 PC7 220P_6 C ORE P C6 270P P C5 220P _6 P C3 680P CMP C L RF CMP RF

20 mil T race list for layout
Added filter for PBOOT
V DP R

2

P C12 1000P

P C13 1000P

1

P R23 31. 6K/F

2

2

9/3 for core funtion
B

19

+ 5V RUN

S S _C

B

5

V I D
VID 5 VID 4 VID 3 VID 2 VID 1 VID 0

Vcore V 1.340 1.324
3
13 DP RS LP VR 17 CLK _E N#

P U10

2 4 1
* N C 7S Z02_NC

2

0 0 0 0 0 0 1 1 1 1 1 1 1

1 1 1 1 1 1 0 0 0 0 0 0 1

0 1 1 1 1 1 0 0 0 1 1 1 0

1 0 0 1 1 1 0 0 1 0 0 1 0

1 0 1 0 0 1 0 1 1 0 1 1 0

1 0 0 0 1 1 1 1 0 1 1 0 0

1

3

1.292 1.260 1.244 1.212 1.180 1.148 1.100 1.052 1.020 0.972 0.940 Change to NOR GATE

PQ56 * CH2507S _NC

+ 3V RUN

P R14

P R15

P R16

P R19

P R18

P R17

*10K _NC

* 10K _NC

*10K _NC

* 10K _NC

*10K _NC

* 10K _NC

C P U_V ID5

C P U_V ID4

C P U_V ID3

C P U_V ID2

C P U_V ID1

C P U_V ID0

A

A

PROJECT : ED2 Quanta Computer Inc.
Size Doc ument Number Rev A3A S heet
1

CPU CORE (SC451)
Dat e: W ednes day , June 15, 2005 33 of 38

PDF created with pdfFactory trial version www.pdffactory.com

5

4

3

2

5

4

3

2

1

+3VALW

8

7

6

P D16 ZD5. 6V
D

0512
P R85

V IN1 PL5 HI0805R800R-00

V IN

5

P C119 100P

P R123 3. 32K /F

P R121 10K /F

2

1

1 2 mil
1

V+ 10

1 2 0mil

1 6 0mil
PQ30 A O4812

D

P C63 P R122 0_6 P R83 1K -0603 *4. 7U/ 25V -1206_NC 5, 27 MA X6657_OV# P R78 * 0 _NC S Y S _RE SET#

2

1

2

3

2

1 D1 2 D1 3 G2 4 S2
PQ35

G1 S1/D2

8 7 6 5
P C121 10U/ 25V -1210 P C71 10U/ 25V -1206

1000P M A IND S US D + 3V SUS P C58 . 1U

A O4916

+ 12V RUN

1P
P R80 100K LX3

2P 2
P R120 0. 015-3720 P C138 470U/ 4V

3

1 5 mil

1 2 0mil
PL14 1 0UH-MS CDR1-104R

1

1 6 0mil
1 1 1
P C57 + *100U/ 6. 3V _NC < Ty pe> C C3528

4

P C64 . 1U-0805

P C123 . 01U

1

P C68 . 1U-0805

P C73

+3VALW

+ 3V RUN P C62 . 1U

+

2 3
PQ49 IRLML5103 DH3 P R77 0_6

2

2

2

1 5 mil Item134 1 5 mil

P C115 560U/ 4V TYPE SVPC

+

P C54 . 1U

+5VALW

16, 32,36 M A INON

2
P R82 220K PQ31 D TC144E U

1

D L3 P U5

1 2
19V

CSH3 CSL3 FB3 12OUT VDD SYNC TIME/ON5 GND REF SKIPRESETFB5 CSL5 CSH5
MA X1632A

RUN/ON3 DH3 LX3 BST3 DL3 SHDNV+ VL PGND DL5 BST5 LX5 DH5 SEQ

28 27 26 25 24
VL BST3 P C118 . 1U/ 50V

9/3 change MOSFET
1 2 0mil

V IN1

1

8

7

6

3
+12VALW

1 5 mil
6/7 P C65 4. 7U/ 16V -1206

4
+15VALW VL

1 5 mil
5 6 7 8 2
P D22 DA P 202U PQ36

P C124 10U/ 25V -1210

P C72 . 1U-0805

1

C

5

+ 5V SUS

5 6
P R87 P R86 * 0 _NC 0_6

C

23 3 1 22 21 20 19 18 17 16 15
P C66

2

1

2

3

R301 10K _4

7 8 9

1 5 mil
2

1

1 5 mil
LX15

P D18 E P 05FA20

+ 15VALW

S US D 4. 7U/ 16V -1206

4
M A IND + 5V RUN P C91 . 1U

4

S I4800DY

PQ55 A O4812

1 5 mil 2

1 1 5 mil
P C85 4. 7U/ 16V -1206 P C84 4. 7U/ 16V -1206

3 2 1

4

2

1

1632RE F 32, 35,36 H W P G P R125 0_6

2 0 mil

10 11 12 13

1 5 mil
BST5 LX5 P C120 . 1U/ 50V

3

1 2 0mil
5 6 7 8

1

0. 01-3720 P R133

2

1 1P

2 2P

1 6 0mil
1 1
P C86 + *100U/ 6. 3V _NC < Ty pe> C C3528

2

1

1 5 mil

DH5

PL16 S TQ125A -7233A

+5VALW

P R89 0_6

P R124 0_6

14

P C135 + 390U/ 6. 3V

+ 5V SUS P C90 . 1U P C132 . 1U

2

2

B

3 2 1

P C67 4. 7U/ 16V -1206

P R90 0_6

PQ50 A O4704

1

2

D L5

4

B

V IN

+3V_S5

+15VALW

+3VALW

V IN

VTT_MEM

+ 1_5VSUS

1. 8V SUS

+ 3V SUS

+5VSUS

+ 15VALW

P R71 1M

P R67 22-0805

P R69 1M

PQ29

P C116

P R136 1M

P R127 22-0805

P R129 22-0805

P R126 22-0805

P R94 22-0805

P R97 22-0805

P R95 1M S US D

3

3

3

3

3

3

3

3

S I5402 P R72 1M

3

32 S 5_ON

2
PQ26 D TC144E U

2
PQ22 CH2507S

2
PQ25 CH2507S

P C53 . 1U

16, 32, 35,36 S US ON

2
PQ43 D TC144E U

P R135 1M

2
PQ52 CH2507S

2
PQ53 CH2507S

2
PQ51 CH2507S

2
PQ38 CH2507S

2
PQ41 C H2507S

2
PQ40 CH2507S

1

1

1

1

1

1

1

1

V IN

1

V H CORE

+ V CCP

+ 1_5V RUN

+ 2_5V RUN

+ 3V RUN

+ 5V RUN

+ 15VALW

P R63
A

P R60 1M

22-0805

P R66 22-0805

P R70 22-0805

P R73 22-0805

P R64 22-0805

P R62 22-0805

P R65 1M M A IND 35

1

3

1 2 3 4

8 7 6 5

. 1U

+3V_S5

A

3

3

3

3

3

3

16, 32,36 M A INON

M A INON 2

3

P R61 1M

2
PQ19 CH2507S

2
PQ21 CH2507S

2

2
PQ23 CH2507S

2
P Q27 CH2507S PQ18 CH2507S

2
PQ17 CH2507S

2
PQ20 CH2507S Size

3

PROJECT : ED2
1

1

1

1

1

1

1

PQ16 D TC144E U

Quanta Computer Inc.
Doc ument Number

1

5V/3.3V(MAX1632A)
Dat e: W ednes day , June 15, 2005
1

Rev A3A S heet 34 of 38

PDF created with pdfFactory trial version www.pdffactory.com

5

4

3

2

5

4

3

2

1

+5VSUS

+5VALW

9/3 change MOSFET
P R132 P R134
D

V IN3 PL8 HI0805R800R-00 V IN

* 0_6_NC 0_6

5 6 7 8

P R93

10

2

PQ46 S I4800DY

P C104 . 1U-0805

P C105 10U/ 25V -1206

P C106 10U/ 25V -1206

D

4 1
P C130 4. 7U/ 10V_8

P C76 P R92 . 1U 1M P D23 S W 1010C

1

2

P U7 16, 32, 34,36 S US ON P R96 0_6

P C134 . 1U-0805

1 2 3 4 5

EN/PSV VIN VOUT VCCA FBK PGOOD GND
S C1470

BST DH LX ILIM VDDP DL PGND

14 13 12 11 10 9 8
DL-1. 5V P R99 DH-1. 5V LX-1.5V 27. 4K /F PL18 2. 5UH-MS CDR1-104R

3 2 1

7A
+ 1_5VSUS

5 6 7 8

1

1

32, 34,36 HW P G

P R128

0_6

6 7

+

2

1

2

C

2

3 2 1

P C75 . 1U

P C74 1000P

P C77 . 47U/ 10V_6

1

PQ45 A O4704 P R131 10K / F

2

2

4

P D24 *S S M14_NC

P C131 560U/ 4V TYPE SVPC

1
P C88 *150U/ 4V _NC < Ty pe> C C3528

+

P C80 10U/ 10V_8

P R130 20K / F

P C126 * . 1U_NC

C

+ 1_5VSUS

5 6 7 8
34 M A IND

4

PQ54 A O4418

3 2 1

+ 1_5V RUN P C125 .1U

B

B

A

A

PROJECT : ED2 Quanta Computer Inc.
Size Doc ument Number Rev A3A S heet
1

2.5VSUS / +1.25TERM
Dat e: W ednes day , June 15, 2005 35 of 38

PDF created with pdfFactory trial version www.pdffactory.com

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D

D

V IN5 P C98 P R101 11K /F V IN5 V IN PL6 HI0805R800R-00 P R112 0_6 P C78 10U/ 25V -1210 P C87 P R111 * 0 _NC 1000P V CCP _FBK P C92 +5VSUS +5VALW P C95 10U/ 25V -1206 P C89 . 1U-0805 PL7 HI0805R800R-00

V IN

9/3 change MOSFET
PQ39 S I4800DY V CCP _DL V C CP _DH + 5V SUS

HW P G

P C136 *10U/ 25V -1206_NC

8.5A
+ V CCP

* 100P _NC P R100 10K /F

2 0 mil 2 0 mil
1
0_6 1U/ 10V _6 P U9 S C1485 T ON2 T ON1

. 1U-0805

8 7 6 5

4
P R102

PGND1 DL1 VDDP1 ILIM1 LX1 DH1 BST1 EN/PSV2 TON2 VOUT2 VCCA2 PGOOD2 FBK2 AGND2

AGND1 PGOOD1 FBK1 VCCA1 VOUT1 TON1 EN/PSV1 BST2 DH2 LX2 ILIM2 VDDP2 DL2 PGND2

28 27 26 25 24
V CCA 1 P C94 1U/ 10V_6

9/3 change MOSFET
P C101 1000P P C96 1000P

2

9/3 short jamp del
1 2 3
C

P C93 PL15 3 R8UH-MS CDR1-104R

1 5 mil
P R137

V DDP 1 15K /F

3 4 5

5 6 7 8

V CCP _LX P D20 P C97 . 1U-0805

PQ42 S I4800DY

C

8 7 6 5

4 23 22 21 20 19 18 17 16 2 15
1. 8V _LX 1. 8V _BST T ON1 P R104 P R105 750K /F 0_6 M A INON V I N5 M A INON 16, 32,34

1

2
S W 1010C

6
V CCP _BST 7 0_6 1M T ON2

1 5 mil
P R138

9/3 short jamp del
1. 8V _DH

1

P C60 . 1U

P C61 . 01U

+

+

1

4
P D17 *S S M14_NC

8 9 10

1 5 mil

P C99

. 1U-0805

2

2

P R103 V IN5

3 2 1

2 0 mil
P R110 0_6 V CCA 2 HW P G

2 0 mil
P R107 15K /F

PL17 2 R5UH-MS CDR1-104R 1. 8V SUS

P C70 *470U/ 2. 5V -7343_NC

+5VALW

P R109

* 0 _NC

P C102 1U/ 10V_6

12 14

S W 1010C

1

P R113

* 0 _NC

+5VALW

4
P R114 0_6 +5VSUS

+ P D19 *S S M14_NC

+ P C137 560U/ 4V TYPE SVPC

P C103 16, 32, 34,35 S US ON 1U/ 10V_6 P R108 11. 3K/F 32, 34,35 H W P G HW P G P R106 30. 1K/F P C100 *100P _NC

3 2 1

S US ON

2

P C127 . 1U

P C83 470U/ 4V -7343

1. 8V _DL

2 0 mil
1. 8V_BAK

B

2

1 5 mil

1

P C122 560U/ 4V TYPE SVPC

PQ37 A O4704

1 2 3

1

13

V DDP 2

P D21

5 6 7 8
PQ44 A O4704

+ 5V SUS

11

B

+3VSUS

PL19 22/ 6A + 5V SUS + 2_5V RUN

P U11 HW P G M A INON

G966

max. 0.5A
VO 6 2 7 5 8 1

1 2 3 4

POK VEN VIN GND VPP

ADJ NC GND

1

1

P R140 30. 1K/F

2

P C139 *0. 01U_4 P C140 150U/ 4V

1
+

P C143 4. 7U/ 6. 3V / X5R

2

2

P C142 0. 1U_4

1

P C141 0. 1U_4

9

2

P R141 14K /F

A

1

2

A

PROJECT : ED2 Quanta Computer Inc.
Size Doc ument Number Rev A3A S heet
1

+VCCP/+1.25V/+2.5V
Dat e: W ednes day , June 15, 2005 36 of 38

PDF created with pdfFactory trial version www.pdffactory.com

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1

VH L53 C 549

2

1

1

2
*33P _4 P C50 . 1U-0805

3

2

*27NH Q= 12 IDC= 300ohm

1

AC

2

P Q12 D TC144E U P R54 182K /F

8 3 2
+ -

P U4A LM358AM

1 1
P D8 S W 1010C

1

VA1

1 5

C N17 VA P C44 P C41 . 1U-0805 . 1U-0805 PL3 H I0805R800R-00

D

2

PD7 SBM1040

4

1 3 2
VA1

P R49

P R56

P C47

D

4 3 2
P OW E RJA CK (IDJ-D14-B2) PL4 H I0805R800R-00

P R48 0. 02-3720

1

P C45 1000P

3

300mil

665/ F

10K -0603

. 01U

PQ34 D TC144E U RE FP

2

2

VA2 P C43 . 01U PL10 HI0805R800R-00 P C49 10U/ 25V -1206

300mil

VH

D / C# 32

VL P C69 . 1U-0805

P C46 . 1U-0805

1

P R91 220K

P R79

8

A O4418

8 7 6 5

2

PQ14

P R55 47K

P R84 22K P U6A

4
VA3 4. 7K _6 + P C110 10U/ 25V -1206 VH V IN

3

1
PQ32 D TC144E U P R81 220K

1

+ -

3 2
LM393

RE F3V

2

1

1 2 3

2

1

P U6B

1

P C48

3

PD6 S W 1010C

2

PD9 S W 1010C

P R53 100K

P C109 . 1U-0805

4

4 3 2 1

1

7 1 2 3 4
P C113 . 01U P R50 *47K _NC LM393

+ -

5 6

32 B L/ C#

2
PQ33 C H2507S

P R88 180K /F

VAD

220P_6 P R52 1K -0603 PQ47 A O4411

P R57 1. 82K/F

P R51 10K -0603

P R58 1. 82K /F

2

6

5

4

P C40

3

3

3 6 5 4
. 01U PQ10 I MZ2 I MD VH

PQ11 I MZ2

1 1 1

PL11 P R119 1 0UH-MS CDR1-104R 0. 02-3720 L1-1 L1-2 2

1 2 1 1P

BAT-V

8 7 6 5

C

5 6 7 8

P R41 18K /F

2

P D5 D A 204U

change charger current

1

1

PQ15 2S A 1576A

2

2

P Q13 2S A 1576A

P Q48 A O4411
C

PL12

HI0805R800R-00 HI0805R800R-00

MBAT+

1

2

3

P D11 SSM24

2

2

2

1

2

3

P C37 . 1U-0805

1

SSM24

P R59 22K P U4B LM358AM P C30 . 1U

P R47 1K -0603

2

P D12

P R117 118/ F

P R118 118/F

P D10 S W 1010C

+

+

1

2P

PL13

5 6

+ -

7

P C112 P C117 *10U/ 25V -1206_NC 100U/ 25V

P C111 . 01U

P R40 169K /F P R116 P C108 . 01U

C N 21

TEMP_MBAT 32 MBAT+ TEMP_MBAT PC52 PC114

6

1

1

1

10K / F-0603

7

5 4 3 2 1

1

PD15

2

2

2

P R29 4. 99K /F P R45 47K P C39 P R43 47K . 1U-0805 P R33 47K MB DATA P R31 20K / F CE LL-SET P R34 P C38 4700P 10K -0603 . 1U P U 2C 32 CC-S E T P R35 4. 7K_6 + LM339 P C42 220P_6 P R44 10K -0603 P C29 . 1U P C33 . 1U OSC 200KHz 1000P P U2D P R39 100K 7. 5K /F P C27 RE F3V P C28 P R36 P R38 P R32 182K /F P R74 330

P R75 330

47P

MB CLK 5,32 MBDATA 5, 32

3

P R46
B

P U2A

1

47K

2 7 6
LM339 P U2B

+ -

5 4
LM339

1

2

S P E -C14455

.1U/50V

P C51 47P

ZD5.6V

1

P C55 47P

2

1

P D13 ZD5. 6V

B

P D14 ZD5. 6V

12

2

P R42 22K

10mil

RE F3V 32
CLOSE TO BATTERY CON

9 8

+ -

11 10
LM339 60. 4K /D

10mil

14

13

CV -S ET 32 RE F3V R457 0_4 P R76 10K /F

10mil

TEMP_MBAT

1

FOR 591 CV REAGE REF
P R28 32 A C IN 10K -0603 VL
A

P R37 36K /F

RE FP PQ9 V IN

20mil
6 5 4

PU3 RE FP 32

RE F3V PD4

3

PQ8 CH2507S

2

P C59 . 01U

2

1

+

A

1 2 3
I MD2

1 2 3

Vin GND SD

Vout

5

RE F3V

RE F3V 32 P R27 6.8K

VAD

1
ZD12V

2

AC

2

BP

P C34 . 1U-0805 32 R E FON

P C36 10U/ 10V_8

MA X8877

P C31 . 1U

P C32 . 1U

P C35 10U/ 10V_8

1

4

P R30 10K -0603

PROJECT : ED2 Quanta Computer Inc.
Size Doc ument Number Rev A3A S heet
1

BATTERY CHARGER
Dat e: W ednes day , June 15, 2005 37 of 38

PDF created with pdfFactory trial version www.pdffactory.com

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